Astera Labs
asteralabs.com
Actively hiring
Servers & Data Center Hardware
Processors, MCUs & AI Chips
As featured in
View 147 jobs
Claim pageClaim
Follow
Overview
News
Technologies
Salaries
Products
People
Growth
Offices
Jobs
Financials
How Astera Labs hires
Truth index
B 82/100
Median time to fill
73 days
Ghost roles
0%
Stale roles
54%
Reposted roles
0%
Astera Labs scores B on the Alion truth index (A is best, E worst), measured over 54 open roles re-checked against its own hiring board: 0% look like ghost listings, 54% have gone stale and 0% are the same role posted again. Its roles close in a median of 73 days. It measures how much of what this employer publishes turns into a real, finite search - not the employer as a workplace. How the index is computed
Visa sponsorship
- United States · H-1B filings in 12 months: 77 · green card filings: 7
- Canada · Positions approved through LMIA in 12 months: 1
Overview
Astera Labs is a fabless semiconductor company specializing in advanced connectivity solutions for artificial intelligence and cloud infrastructure. Headquartered in San Jose, California, the firm designs integrated circuits, modules, and software that eliminate data bottlenecks between processors, memory, and network devices. Through its intelligent connectivity platform, it enables hyperscalers and data center operators to build scalable, high-performance computing systems.
News
The Ecosystem of Optical Fiber-to-Chip Connectors: Building Blocks of NPO and CPO for Scale-Up AI
We've been framing the increasing adoption of optical connectivity for scale-up applications with a clear organizing principle: Copper where you can, optics where you must. At today's per-lane signaling rates in rack-scale AI fabrics, "must" is moving ins
Read more
Report
Seven Years Later: 200G Ethernet Retimers vs. Redrivers
Seven years ago, I wrote about the eye-popping difference between retimers and redrivers. The central point was that a redriver boosts an impaired signal, while a retimer recovers the data, extracts the embedded clock, and retransmits a fresh copy of the
Read more
Report
Advancing Standards-Based AI Fabric RAS Through Astera Labs' COSMOS and Insyde Supervyse
As the AI industry responds to demanding agentic and high-context inference workloads by adopting rack-scale and beyond architectures, data center operators are no longer managing a handful of high-speed links in isolation.They're managing far larger popu
Read more
Report
Industry-Leading, High-Volume Scorpio Smart Fabric Switches and Aries Smart Retimers Achieve Compliance at First PCI-SIG 6.x Workshop
Astera Labs Accelerates Time-to-Market With Proven and High-Volume Interoperable SolutionsWe've recently hit a new milestone on our journey to deliver "AI Your Way" to hyperscalers and AI model labs through continued commitment to open scale-up standards
Read more
Report
What's Driving the Optical Transition? An Optimization Problem With 5 Factors
5 Factors at a Glance:AI workloads are pushing infrastructure from copper toward optics for greater speed.Higher data rates shrink achievable reach, straining passive copper.Optics extend reach and speed but add real power and cooling demands.Copper can h
Read more
Report
One Footprint, Many Architectures: Why AI Racks Need an Open Signal Conditioning Standard
Not long ago, a single AI training server housed eight accelerators, all connected within a single chassis. Today, that number has grown to 72 or more accelerators per rack - and industry roadmaps are pointing toward multi-rack and row-scale compute domai
Read more
Report
AI Your Way at AMD Advancing AI 2026: Why Open Standards Power AI Everywhere
As I took in everything AMD showcased under their "AI Everywhere" messaging at Advancing AI 2026, I came away more confident than ever in how our promise of "AI Your Way" is essential to delivering it.AMD CEO Lisa Su's keynote made clear that inference an
Read more
Report
The 1.2-Meter Challenge: Understanding Your Passive Copper Options at 224G
You have 40 dB of channel budget and 1.75 meters to traverse in a cable backplane in a modern AI rack. At 224G, those two numbers don't play nicely together. But the evolution of the AI infrastructure landscape is making this a problem we can't ignore: We
Read more
Report
"AI Your Way" in Action: How We Put Our Principles Into Execution With NVIDIA NVLink Fusion
When NVIDIA unveiled NVLink Fusion at Computex back in 2025, we were proud to be included as a lead partner providing scale-up connectivity solutions. Joining the NVLink Fusion ecosystem was a no-brainer for us: Our mission has always been to create purpo
Read more
Report
Computex 2026: Agentic Workloads, CPUs Take Center Stage for AI Infrastructure
Computex 2026 put agentic AI and the CPU on the same track.They showed up together in the biggest keynotes of the week. Intel talked about CPUs as the orchestration layer for agentic systems. Arm argued that agents are driving a fresh wave of CPU demand i
Read more
Report
Show more news
Tech stack
Technologies named in job postings at Astera Labs over the last 12 months, by layer, with the share of postings for each.
Technologies in use
118
Postings analysed
223
Stack modernity
81/100AI adopter
Languages
Python53%
SystemVerilog19%
Perl18%
C++15%
Frameworks & libraries
UVM13%
Cosmos SDK<1%
FastAPI<1%
Pandas<1%
Databases
Amazon Redshift<1%
PostgreSQL<1%
Snowflake<1%
Cloud & platforms
Linux9%
RTOS3%
AWS2%
GitHub2%
AI & ML
BERT4%
LLM1%
ChatGPT<1%
Sign in to see how your skills match this stack
Sign In
Full Astera Labs tech stack
118 technologies · by team · pay by technology · changes · similar stacks
Salary insights
Compensation ranges based on this company's open jobs
Median
$230k
Typical range
$140k – $300k
Open positions
61
58
Jobs
Middle
1.7%
Senior
19%
Staff
15.5%
Principal
56.9%
Architect
6.9%
| Level | Jobs | Median | Typical range |
|---|---|---|---|
| Middle | 1 | $200k | $200k |
| Senior | 11 | $195k | $149k – $300k |
| Staff | 9 | $200k | $170k – $295k |
| Principal | 33 | $240k | $149k – $260k |
| Architect | 4 | $250k | $240k – $275k |
Highest paying role
Technical Chief of Staff for ASIC Engineering
$300k
Normalized to USD per year
All salaries at Astera Labs
By role, level and city, against the market · 61 jobs with pay
People
Gajendra Akkasalamakki
Executive Officer, Director
Jitendra Mohan
Executive Officer, Director
Ronald Jankov
Director
Manuel Alba
Director
Stefan Dyckerhoff
Director
Names and roles come from public filings, company registers and the company's own site. Is this you? Correct or remove · How we handle this data
Growth
Hiring Momentum
74/100
Growing
Open positions
157
35 opened / 33 closed in 30 days
Median time-to-fill
74 days
faster than 17% of the market
ATS activity
Every ~4 hours
Today
Hiring Dynamics
+100%
Hiring Focus
The percentage next to each role is its share of the company's job openings over the last 90 days; the arrow shows the shift versus the previous period.
Hardware
35% ▲
Industrial Engineering
25% ▲
Leadership
14% ▼
HR
4%
Backend
3% ▼
DevOps
3% ▼
Actively hiring for Hardware (+14 in 30 days)
Activity Timeline
Added Cadence Conformal to stack
Oct 2026
+9 jobs in a week
Oct 2026
Added Platform Engineering to stack
Oct 2026
Added Power BI to stack
Oct 2026
Added Cosmos to stack
Oct 2026
Added Go to stack
Oct 2026
Added JTAG Debuggers to stack
Oct 2026
Added Cosmos SDK to stack
Oct 2026
Added RAG to stack
Oct 2026
Added Multi-Agent Systems to stack
Oct 2026
Added Azure DevOps to stack
Sep 2026
+6 jobs in a week
Sep 2026
Offices
Where the company hires and what each office is for
Cities
22
Hiring now
14
Countries
11
Busiest office
San Jose
Loading the map
Headquarters
Builds here
Office with open vacancies
No open vacancies right now Tap a pin for the office
San Jose
United States
HQ
Headquarters / United States
78 open roles 71 posted in 90 days 45% engineering 1000-5000 est. staff $232k Avg Salary
hires for Hardware, Industrial Engineering, Leadership
2345 North First Street, San Jose CA 95131
Tel Aviv
Israel
Engineering / R&D
Tel Aviv
18 open roles 4 posted in 90 days 67% engineering 200-500 est. staff
hires for Hardware, Industrial Engineering, Product
Bengaluru
India
Engineering / R&D
Bengaluru
15 open roles 15 posted in 90 days 73% engineering 200-500 est. staff $185k Avg Salary
hires for Hardware, Leadership
Taipei
Taiwan
Engineering / R&D
Taipei
10 open roles 5 posted in 90 days 30% engineering 50-200 est. staff
hires for Industrial Engineering, Hardware, Backend
Toronto
Canada
Engineering / R&D
Toronto
7 open roles 5 posted in 90 days 43% engineering 50-200 est. staff $149k Avg Salary
hires for Hardware, Industrial Engineering, Leadership
1380 Rodick Rd, Suite 102B, Markham, Ontario, Canada L3R 4G5
Singapore
Singapore
Plant / site
Remote - Singapore
6 open roles 7 posted in 90 days 33% engineering 50-200 est. staff
hires for Industrial Engineering, Hardware, Leadership
Singapore 408533
Haifa
Israel
Engineering / R&D
Tel Aviv
6 open roles 3 posted in 90 days 50% engineering 50-200 est. staff
hires for Industrial Engineering, Hardware, Frontend
Nahum Het St 5, Floor 3,, Tirat Carmel, 96050, Israel
Aachen
Germany
Engineering / R&D
Germany
3 open roles 3 posted in 90 days 33% engineering 10-50 est. staff
hires for QA, Operations, Industrial Engineering
Shanghai
China
Regional office
Shanghai
2 open roles 3 posted in 90 days 50-200 est. staff
hires for Product, Industrial Engineering
Ahmedabad
India
Engineering / R&D
Ahmedabad
2 open roles 2 posted in 90 days 50% engineering 10-50 est. staff
hires for Hardware, Industrial Engineering
B Block, 1101-1103, 11th Floor, Navratna Corporate Park, Opp. Dishman House, Iscon Ambli Road, Ahmedabad – 380059, India
Vancouver
Canada
Regional office
Vancouver
2 open roles 2 posted in 90 days 100% engineering 10-50 est. staff $150k Avg Salary
hires for Backend, Hardware
Ho Chi Minh City
Vietnam
Regional office
Ho Chi Minh City
2 open roles 2 posted in 90 days 10-50 est. staff
hires for Leadership, Industrial Engineering
Hyderabad
India
Engineering / R&D
Hyderabad
1 open roles 1 posted in 90 days 10-50 est. staff
hires for Leadership
Dallas Centre, 2nd Floor, Raidurg, Hyderabad – 500032, India
Irvine
United States
Regional office
Irvine
1 open roles 2 posted in 90 days 10-50 est. staff $210k Avg Salary
hires for Industrial Engineering
15635 Alton Parkway #260, Irvine, CA 92618
Seattle
United States
Regional office
Seattle
1 posted in 90 days 10-50 est. staff
5209 Lake Washington Blvd NE, Kirkland, WA 98033
Austin
United States
Regional office
Austin
9442 N Capital of Texas Hwy
Park
United States
Regional office
Bengaluru
Helios Business Park, Wing-D, Ground Floor, Sy Nos. 23/1, 23/2, 24/1 and 24/2,
Beijing
China
Regional office
Beijing
Shenzhen
China
Regional office
Shenzhen
Bangkok
Thailand
Regional office
Bangkok
Boston
United States
Regional office
Remote - Boston
Best
Netherlands
Regional office
Netherlands
Jobs
≈ $119k – $219k per year (Estimated) • In office • 15+ years exp • Bachelor's Degree • Toronto
Python
Perl
AI Agents
NVLink
Chips/EDA
Cadence Innovus
Synopsys Fusion Compiler
Apply
$118k – $150k per year • In office • 8+ years exp • Bachelor's Degree • Vancouver
Python
NVLink
Apply
$135k – $170k per year • In office • 7+ years exp • Bachelor's Degree • San Jose
Python
SQL
FastAPI
Databases
PostgreSQL
AI/ML
Copilot
Cursor
Claude Code
NVLink
DevOps
Bitbucket
GitHub
Cybersecurity
LDAP
Apply
$161k – $200k per year • In office • 4+ years exp • Bachelor's Degree • San Jose
Python
Verilog
SystemVerilog
Fine-tuning
AI Agents
LLM
RAG
NVLink
Multi-Agent Systems
DevOps
CI/CD
Chips/EDA
Cadence JasperGold
Formal Verification
Synopsys VC Formal
Apply
≈ $32k – $72k per year (Estimated) • In office • 10+ years exp • Bachelor's Degree • Bengaluru
Python
Verilog
SystemVerilog
Perl
NVLink
Chips/EDA
Formal Verification
Apply
≈ $184k – $348k per year (Estimated) • In office • 12+ years exp • Bachelor's Degree • San Jose
Python
NVLink
Chips/EDA
Cadence Allegro
OrCAD
Apply
$205k – $260k per year • In office • 8+ years exp • Bachelor's Degree • San Jose
NVLink
Apply
≈ $147k – $335k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Tel Aviv
NVLink
Chips/EDA
Cadence Innovus
Synopsys Fusion Compiler
Apply
≈ $142k – $323k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Tel Aviv
Python
Verilog
SystemVerilog
Perl
NVLink
MedTech
Verification & Validation
Apply
≈ $181k – $337k per year (Estimated) • In office • 12+ years exp • Bachelor's Degree • San Jose
Python
NVLink
Chips/EDA
Cadence Allegro
OrCAD
Apply
≈ $185k – $351k per year (Estimated) • In office • 8+ years exp • Bachelor's Degree • San Jose
Python
C++
NVLink
Apply
$185k – $240k per year • In office • 3+ years exp • San Jose
Python
NVLink
Apply