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Overview
RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration.
News
World RISC-V Days: Tel Aviv Israel
Summary RISC-V Days Tel Aviv brought together more than 60 registered attendees from the local RISC-V community for an opportunity to connect, exchange ideas, and explore the growing RISC-V ecosystem. The event highlighted the continued momentum around RI
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World RISC-V Days: Turin Italy
Summary RISC-V Days Turin brought together more than 225 registered attendees for a strong showcase of RISC-V innovation across research and industry. The program explored comparative benchmarking, fully open-source chip development, and emerging technolo
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World RISC-V Days: Gujarat India
Summary RISC-V Days Gujarat brought together 66 attendees for a hands-on look at real-world RISC-V applications and development workflows. The event featured live demonstrations, a practical session on running Linux on an FPGA using a RISC-V core, and clo
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World RISC-V Days: Boston USA
Summary RISC-V Days Boston brought together attendees for an engaging look at RISC-V, despite a major snowstorm affecting the area. The event combined a deep dive into why RISC-V is important with hands-on experience using RISC-V hardware, Fedora, and AI,
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World RISC-V Days: Nairobi Africa
Summary RISC-V Days Nairobi brought together 24 registered attendees for a day of learning and discussion around the RISC-V ecosystem. Sessions covered everything from an introduction to RISC-V and the open-source hardware ecosystem to IC design, student
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