{"id":2429514,"url":"https://alion.io/job/4staffing-senior-asic-verification-engineer-ai-hardware","title":"Senior ASIC Verification Engineer (AI Hardware)","company":{"id":4423782,"name":"4 Staffing Corp","domain":"4staffing.net","url":"https://alion.io/company/4staffing","size_band":null,"is_staffing_agency":true,"employer_type":"agency","is_intermediary":false,"listed_via":null,"ats_vendor":"Manatal","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150000,"max":230000,"currency":"USD","period":"year","gross":null,"usd_annual":230000},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Formal Verification","optional":true}],"status":"live","first_seen_at":"2026-10-13T08:30:53Z","employer_posted_date":"2026-10-13","last_verified_at":"2026-10-22T05:17:53Z","board_verified":true,"closed_at":null,"days_open":9,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":9},"description":"Senior ASIC Verification Engineer (AI Hardware) - Remote (U.S.) - No Visa Sponsorship\nOverview\nOur client an AI / Compute company of the verge of being the next Nvidia is looking for an experienced ASIC Verification Engineer to help ensure the quality, reliability, and performance of their next-generation AI-focused silicon. In this role, you'll partner closely with design, architecture, and software teams to validate complex hardware systems and contribute to cutting-edge compute solutions. This position also offers the opportunity to take ownership of verification efforts and influence best practices across projects.\nKey Responsibilities\nDefine and drive verification strategies for advanced ASIC designs used in AI/compute workloads\n\nBuild and execute detailed verification plans, including coverage goals and validation approaches\n\nDevelop scalable verification environments using System Verilog and UVM\n\nCreate simulation infrastructure, including testbenches and both directed and constrained-random test scenarios\n\nWork cross-functionally with design and architecture teams to achieve coverage closure and functional accuracy\n\nIdentify, debug, and resolve design issues throughout pre-silicon and early silicon validation phases\n\nPartner with FPGA and emulation teams to support early prototyping and validation efforts\n\nTrack project milestones, manage verification deliverables, and proactively address risks\n\nRequired Background\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline\n\n8+ years of hands-on experience in ASIC or SoC verification\n\nStrong proficiency with System Verilog and UVM-based verification flows\n\nDeep understanding of verification planning, coverage methodologies, and testbench architecture\n\nExperience working with leading EDA toolchains (e.g., Cadence, Synopsys, Siemens EDA)\n\nSolid debugging skills, including waveform analysis and scripting (Python, Tcl, or similar)\n\nExposure to high-performance compute architectures such as AI accelerators, memory hierarchies, or high-speed interfaces\n\nDemonstrated success verifying complex silicon designs\n\nNice to Have\nAdvanced degree in a relevant engineering field\n\nExperience with hardware/software integration or co-verification\n\nFamiliarity with formal verification methods\n\nExposure to post-silicon validation, bring-up, or lab debug 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