{"id":4002182,"url":"https://alion.io/job/actalent-fpga-design-engineer","title":"FPGA Design Engineer","company":{"id":2052396,"name":"Actalent","domain":"actalentservices.com","url":"https://alion.io/company/actalentservices","size_band":"51-200","is_staffing_agency":true,"employer_type":"agency","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"contractor","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Ottawa, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":65,"max":85,"currency":"CAD","period":"hour","gross":null,"usd_annual":120000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-11-10T00:00:00Z","employer_posted_date":null,"last_verified_at":"2026-11-10T00:00:00Z","board_verified":false,"closed_at":null,"days_open":0,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":0},"description":"Job Title: FPGA Design EngineerJob DescriptionYou will work with Xilinx devices, SystemVerilog, and Cadence simulation tools to implement, verify, and refine FPGA logic, combining reuse of existing modules with targeted development from scratch. The scope of your work will align with your experience level, ranging from extensive new logic creation for more experienced engineers to focused development and enhancement of existing designs for those earlier in their careers.Responsibilities\nDesign and implement FPGA logic using Xilinx devices, leveraging existing components and creating new modules where needed.\nDevelop, maintain, and refine RTL code in SystemVerilog for complex digital designs.\nUse Cadence tools to run simulations, analyze results, and validate FPGA functionality.\nModify existing test cases to cover new features and design changes, ensuring thorough verification.\nDebug FPGA designs by identifying, analyzing, and resolving functional and timing issues.\nCollaborate with other FPGA designers and expert verification engineers to define requirements, review designs, and improve overall platform quality.\nContribute to feature additions and new platform variants that support an optical switch and multiple digital interfaces.\nApply good digital design practices, including modular design, code reuse, and clear documentation.\nInterface with related hardware components such as DACs, ADCs, external memories, and multiplexers using vendor IP where appropriate.\nSupport synthesis, timing constraints, and timing analysis activities when required to meet performance and reliability targets.\nEssential Skills\n5+ years of ASIC/FPGA Design experience\nStrong proficiency in SystemVerilog for digital design and verification.\nExperience with synthesis, timing constraints, and timing analysis for FPGA designs.\nHands-on experience using Cadence tools for FPGA simulation.\nFamiliarity with simulation environments and the ability to work within existing simulation frameworks.\nPractical experience with design debug, including analyzing simulation results and resolving functional issues.\nAdditional Skills & Qualifications\nKnowledge of VHDL for digital design and maintenance of legacy or mixed-language code bases.\nFamiliarity with Xilinx Vivado or similar FPGA development tools.\nExposure to scripting (for example, Python) to automate design, simulation, or verification tasks.\nExperience with C or C++ for firmware or low-level software that interfaces with FPGA logic.\nExperience in DSP or high-speed digital design.\nUnderstanding of PCIe and other high-speed interfaces implemented on FPGA platforms.\nExperience working with DACs, ADCs, external memories, and multiplexers, including use of vendor IP cores.\nJob Type & LocationThis is a Contract to Hire position based out of Ottawa, ON.\nPay and BenefitsThe pay range for this position is $65.00 - $85.00/hr. Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.\nJob Type & LocationThis is a Contract to Hire position based out of Ottawa, ON.\nWorkplace TypeThis is a fully onsite position in Ottawa,ON. \n\nÀ propos d'Actalent\n\nActalent est un leader mondial dans les services dingénierie et de sciences ainsi que dans les solutions de talents. Nous aidons des entreprises visionnaires à faire progresser leurs initiatives dingénierie et de science grâce à laccès à des experts spécialisés qui favorisent léchelle, linnovation et la rapidité de mise sur le marché. Avec un réseau de près de 20 000 consultants et 5 000 clients à travers les États-Unis, le Canada, lAsie et lEurope, Actalent dessert de nombreuses entreprises du Fortune 500. Nous sommes fiers dêtre lune des 500 meilleures firmes de conception de lEngineering News-Record (ENR) pour nos services de conception en ingénierie et un lauréat du prix ClearlyRated Best of Staffing® tant pour le service client que pour les talents.\n\n Actalent est un employeur souscrivant au principe de légalité des chances et accepte toutes les candidatures sans tenir compte de la race, du sexe, de lâge, de la couleur, de la religion, des origines nationales, du statut dancien combattant, dun handicap, de lorientation sexuelle, de lidentité sexuelle, des renseignements génétiques ou de toute autre caractéristique protégée par la loi.\n\n Si vous souhaitez faire une demande daccommodement raisonnable, tel que la modification ou lajustement du processus de demande demploi ou dentrevue à cause dun handicap, veuillez envoyer un courriel à  pour connaître dautres options daccommodement.\n\nOrdonnance sur légalité des chances de San Francisco:\nConformément à lOrdonnance sur légalité des chances de San Francisco, pour tous les postes situés dans la ville et le comté de San Francisco, nous examinerons les candidatures des personnes qualifiées ayant un casier judiciaire ou des antécédents criminels. \n\nUtilisation de lintelligence artificielle (IA):\nNous pouvons utiliser lintelligence artificielle (IA) pour soutenir certaines étapes de notre processus dembauche, notamment la recherche, la présélection et lévaluation des candidatures. LIA aide à analyser les candidatures et les qualifications, mais les décisions finales sont prises par notre équipe de recrutement. En soumettant votre candidature, vous reconnaissez et acceptez que celle-ci puisse être examinée à laide doutils dIA.\n\nAbout Actalent\n\nActalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.\n\nThe company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.\n\nIf you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email  for other accommodation options.\n\nSan Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.\n\nUse of Artificial Intelligence (AI):We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.","description_format":"text","description_chars":7295,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-11-10T04:11:16Z"}],"visa":[],"liveness":{"score":52,"band":"ok","label":"Likely open","p_open":1,"p_active":0.516,"p_room":1,"age_days":0,"expected_fill_days":8,"reasons":["seen:0","agency","win:early"],"computed_at":"2026-11-10T05:57:17Z"},"pay":{"stated_usd_annual":120000,"is_top_pay":false},"html_url":"https://alion.io/job/actalent-fpga-design-engineer","json_url":"https://alion.io/job/actalent-fpga-design-engineer.json","meta":{"generated_at":"2026-11-10T05:57:17Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13788,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2052396},"rest":"https://alion.io/mcp/rest/get_company?id=2052396"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Factalent-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Factalent-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Factalent-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/actalent-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Factalent-fpga-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4002182}},{"tool":"search_jobs","arguments":{"company":"actalentservices.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4002182},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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