{"id":469627,"url":"https://alion.io/job/aerovironment-rf-pcba-design-and-test-engineer","title":"RF PCBA Design and Test Engineer","company":{"id":176366,"name":"AeroVironment","domain":"avinc.com","url":"https://alion.io/company/aerovironment","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":82,"open_postings":34,"ghost_share":0,"stale_share":0.735,"repost_share":0,"time_to_fill_p50_days":31,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Albuquerque, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":111500,"max":170000,"currency":"USD","period":"year","gross":null,"usd_annual":170000},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Altium Designer","optional":false},{"name":"Ansys HFSS","optional":false},{"name":"Ansys SIwave","optional":false},{"name":"Cadence Allegro","optional":false},{"name":"Cadence Sigrity","optional":false},{"name":"FMEA","optional":false},{"name":"Keysight ADS","optional":false},{"name":"MATLAB","optional":false},{"name":"Mentor Xpedition","optional":false},{"name":"MIL-STD-810","optional":false},{"name":"OrCAD","optional":false},{"name":"Power BI","optional":false},{"name":"Python","optional":false},{"name":"SQL","optional":false},{"name":"Tableau","optional":false}],"status":"live","first_seen_at":"2026-08-21T00:00:00Z","employer_posted_date":"2026-08-21","last_verified_at":"2026-10-21T05:18:52Z","board_verified":true,"closed_at":null,"days_open":61,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":61},"description":"Worker Type\nRegularJob Description\nSummary\nWe are seeking an RF PCBA Design and Test Engineer for the design, integration, and delivery of high-reliability RF/mixed-signal printed circuit assemblies for phased-array and advanced radar/communications products. You will own the PCB lifecycle-from stack-up definition and layout governance through fabrication, assembly, bring-up, release, and test lifecycle for production circuit card assemblies (CCAs) and integrated RF systems.\nPosition Responsibilities\nDefine multilayer, hybrid dielectric RF stack- including impedance tables, via strategy (blind/buried, backdrill, VIPPO), copper weights, and plating/finish (ENIG/ENEPIG) to meet RF loss, isolation, and manufacturability targets.\nPartition boards for RF, mixed-signal, and high-speed digital with attention to shielding, grounding, return paths, and thermal management (coins, thermal vias, heat spreaders).\nEstablish and enforce RF layout rules (transitions, launch geometries, via fences, cavity cutouts, keep-outs) and high-speed constraints (length/phase matching, crosstalk control, reference continuity).\nPerform SI/PI/RF simulation and verification (e.g., ADS, HFSS, SIwave/Sigrity, CST) to predict insertion loss, VSWR/return loss, coupling, eye margins, and PDN impedance.\nLead schematic capture, ECAD library governance (footprints/3D models), and DRC/DFM sign-off in Altium/Cadence/Mentor.\nRun formal design reviews, drive closure of action items, and maintain design histories, BOMs, and ECOs through PLM.\nOwn fab and assembly drawing packages, stack-up notes, controlled impedance requirements, coupons, panelization, and testability features.\nCollaborate with PCB fabs/CMs on builds (Class 3), negotiate tolerances, and resolve issues (mask alignment, plating thickness, impedance yield, lamination strategy).\nPlan and execute board bring-up; define acceptance tests and interface with RF test for S-parameters, noise figure, PAE, ACPR/EVM, and linearity (P1dB/IP3/AM-AM/AM-PM).\nDefine, implement, and sustain acceptance tests for CCAs (Rx/Tx/control/power) with clear entry/exit criteria, coverage metrics, and pass/fail limits; maintain golden units and calibration artifacts.\nArchitect automated test sequences (Python/LabVIEW/MATLAB or similar) for VNAs, spectrum analyzers, signal generators, power meters, oscilloscopes, and RF switch matrices; integrate data logging, serialization, and dashboards; manage version control and CI where appropriate.\nOther duties as assigned\nBasic Qualifications\nBachelor’s degree in electrical engineering or related engineering field.\n8+ years in RF/microwave and mixed-signal PCB development for high-reliability products.\nTechnical Depth:\nProven expertise in RF board layout for L/S/C/X/Ku/Ka-band front-ends (LNAs, PAs, switches, beamformers, PLL/synth, couplers/splitters).\nHands-on with hybrid stack-ups, controlled impedance design, backdrill/HDI strategies, and thermal/shielding practices.\nTools: Proficiency with one or more ECAD suites (Altium Designer, Cadence Allegro/OrCAD, Mentor/Xpedition) and analysis tools (Keysight ADS, Ansys HFSS/SIwave, CST).\nHands-on with RF measurements and analysis: S-parameters, gain/NF, linearity (P1dB/IP3), modulation metrics (EVM/ACLR), phase noise, timing/synchronization, PLL/synth chains, PA/LNA/mixer characterization.\nProficiency automating instruments and data pipelines (Python and/or LabVIEW; MATLAB a plus) using SCPI/IVI; experience with LAN/USB/GPIB control, data historians/MES, and dashboarding (e.g., Power BI/Tableau/SQL). \nWorking knowledge of IPC-2221/2223, IPC-6012, IPC-A-600/-610 Class 3, ANSI/ESD S20.20, environmental/EMI test practices (e.g., MIL-STD-810/461 as applicable), calibration traceability,+ and DoD documentation practices.\nAbility to obtain a DoD Top-Secret/SCI clearance.\nOther Qualifications & Desired Competencies\nMaster’s degree preferred.\nExperience delivering phased-array TR modules, beamforming IC integrations, or wideband front-ends in production.\nBackground in design for ruggedization and environmental screening (thermal cycling, vibe/shock) and reliability analysis (derating, FMEA).\nFamiliarity with PLM (e.g., Arena/Windchill), manufacturing with domestic CMs, and rapid RCCA/MRB/CCB processes.\nExposure to mmWave packaging, RF connectors/launches (SMPM/SMP/SEARAY/coax launches), and fixture design for S-parameter/over-the-air test.\nCertifications (IPC CID/CID+), or equivalent PCB design credentials.\nExcellent technical communication, supplier interaction, and concise documentation skills.\nTrack record leading cross-functional design efforts, running reviews, and mentoring engineers.\nActive Secret or TS preferred.\nPhysical Demands\nAbility to work in an office and manufacturing environment (Constant)\n\nRequired to sit and stand for long periods; talk, hear, and use hands and fingers to operate a computer and telephone keyboard (Frequent)\n\nClearance Level\nTS/SCIThe salary range for this role is:\n$111,500 - $170,000AeroVironment considers several factors when extending an offer, including but not limited to, the location, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills.\nITAR Requirement:\nThis position requires access to information that is subject to compliance with the International Traffic Arms Regulations (“ITAR”) and/or the Export Administration Regulations (“EAR”). In order to comply with the requirements of the ITAR and/or the EAR, applicants must qualify as a U.S. person under the ITAR and the EAR, or a person to be approved for an export license by the governing agency whose technology comes under its jurisdiction. Please understand that any job offer that requires approval of an export license will be conditional on AeroVironment’s determination that it will be able to obtain an export license in a time frame consistent with AeroVironment’s business requirements. A “U.S. person” according to the ITAR definition is a U.S. citizen, U.S. lawful permanent resident (green card holder), or protected individual such as a refugee or asylee. See 22 CFR § 120.15. Some positions will require current U.S. Citizenship due to contract requirements.\nBenefits: AV offers an excellent benefits package including medical, dental vision, 401K with company matching, a 9/80 work schedule and a paid holiday shutdown. For more information about our company benefit offerings please visit: http://www.avinc.com/myavbenefits.\nWe also encourage you to review our company website at http://www.avinc.com to learn more about us.\nPrincipals only need apply. NO agencies please.\nAbout AV:\nAV isn’t for everyone. We hire the curious, the relentless, the mission-obsessed. The best of the best.\nWe don’t just build defense technology-we redefine what’s possible. As the premier autonomous systems company in the U.S., AV delivers breakthrough capabilities across air, land, sea, space, and cyber. From AI-powered drones and loitering munitions to integrated autonomy and space resilience, our technologies shape the future of warfare and protect those who serve.\nFounded by legendary innovator Dr. Paul MacCready, AV has spent over 50 years pushing the boundaries of what unmanned systems can do. Our heritage includes seven platforms in the Smithsonian-but we’re not building history, we’re building what’s next.\nIf you're ready to build technology that matters-with speed, scale, and purpose-there’s no better place to do it than AV.\nWe are proud to be an EEO/AA Equal Opportunity Employer, including disability/veterans. AeroVironment, Inc. is an Equal Employment Opportunity (EEO) employer and welcomes all qualified applicants. Qualified applicants will receive fair and impartial consideration without regard to race, sex, color, religion, national origin, age, disability, protected veteran status, genetic data, sexual orientation, gender identity or other legally protected status.\nITAR\nU.S. Citizenship is required. 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