{"id":105220,"url":"https://alion.io/job/alice-bob-senior-integration-yield-engineer-superconducting-quantum-circuits-hf","title":"Senior Integration & Yield Engineer — Superconducting Quantum Circuits H/F","company":{"id":1906,"name":"Alice & Bob","domain":"alice-bob.com","url":"https://alion.io/company/alice-bob","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"A","score":85,"open_postings":5,"ghost_share":0,"stale_share":0.4,"repost_share":0,"time_to_fill_p50_days":61,"computed_at":"2026-11-01T06:10:25Z"}},"role":"Semiconductors","role_family":"Semiconductors","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Aubervilliers, France"],"countries":["FR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":61000,"max_usd":120000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":107},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"CAPA","optional":false},{"name":"FMEA","optional":false},{"name":"JMP","optional":false},{"name":"Python","optional":false},{"name":"Statistical Process Control","optional":false}],"status":"live","first_seen_at":"2026-07-30T12:30:13Z","employer_posted_date":"2026-07-30","last_verified_at":"2026-11-01T22:02:35Z","board_verified":true,"closed_at":null,"days_open":94,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":94},"description":"About the role\nWe are seeking a Senior Integration & Yield Engineer to join the Foundries & Process Integration team within the Quantum Hardware & Infrastructure department.\nThe role sits at the interface between qubit design and the chip manufacturing teams. Its purpose is twofold: ensure that device designs translate reliably into high-performing fabricated circuits, and provide the data foundation for process improvement decisions. You will own yield monitoring across our fabrication flows, lead the analysis of fabrication and test data, and maintain the interfaces between design and manufacturing - supporting the scale-up from tens of qubits to a few hundred, and enabling our path toward fault-tolerant quantum computing.\n\nResponsabilities\nYield engineering & data analysis\nOwn yield monitoring across fabrication flows: define metrics, build automated dashboards (wafer reports), and provide real-time visibility of fab performance and yield.\nLead root cause analysis of systematic and random yield detractors, in collaboration with the chip manufacturing teams.\nPerform advanced statistical analysis (using Python/JMP) to ensure process stability and control variability.\nDevelop strategies to reduce inductance/frequency non-uniformity within and across wafers, improving the consistency of qubit performance (frequency targeting, coherence times).\nProcess Integration\nDefine and maintain robust integration flows of POR (process of reference), ensuring design-to-fab alignment.\nEstablish Design for Manufacturability (DFM) guidelines.\nDocument and maintain reference fabrication flows, yield dashboards, and process KPIs to support process reviews.\nDesign-to-fabrication interface\nOwn the look-up tables (LUT) linking design parameters to Josephson junction fabrication, and maintain their accuracy as fabrication processes evolve.\nTest and implement Design Rule Manual (DRM) extensions in collaboration with the design and fabrication teams, and establish Design for Manufacturability (DFM) guidelines.\nTranslate device designs into fabrication-ready wafer layouts (wafer layout generation), and develop Python-based tools to automate the design-to-wafer pipeline and reduce manual handoff errors.\nFailure analysis coordination & continuous improvement\nCoordinate the investigation of device failures at room and cryogenic temperatures using electrical test data, inline metrology, and advanced microscopy (SEM, AFM).\nLead corrective and preventive actions using structured problem-solving methodologies (5 Whys, Ishikawa).\nRequirements\nMaster's degree or Ph.D. in Physics, Materials Science, or a related field.\n3+ years of hands-on experience in semiconductor or superconducting circuit nanofabrication or process integration.\nProven expertise in yield engineering, SPC, DOE, and statistical analysis tools.\nProficiency in Python scripting to adapt and extend tools connecting design and fabrication workflows.\nStrong problem-solving mindset and command of root cause analysis methodologies (5 Whys, FMEA, Ishikawa).\nExcellent communication skills and the ability to work effectively in a cross-disciplinary environment.\nExperience in the fabrication or characterization of superconducting circuits, or in cryogenic testing is a plus.\nRecruitment Process\nScreening Call with Alexandra, Talent Acquisition Specialist (30 min)\nHiring Manager Interview with Alireza (45 min)\nTechnical Interview/Presentation with the Team (120 min)\nLeadership Team Interview (45 min)\nFit Interview (45 min)\nReference check","description_format":"text","description_chars":3522,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"France","iso":"FR","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Quantum Computing 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