{"id":118291,"url":"https://alion.io/job/altera-analog-layout-design-engineer-4","title":"Analog Layout Design Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":91,"open_postings":16,"ghost_share":0,"stale_share":0.313,"repost_share":0.063,"time_to_fill_p50_days":57,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Haifa, Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":88000,"max_usd":255000,"period":"year","method":null,"sample_n":3689},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false}],"status":"live","first_seen_at":"2026-08-24T00:00:00Z","employer_posted_date":"2026-08-24","last_verified_at":"2026-10-18T03:56:16Z","board_verified":true,"closed_at":null,"days_open":55,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":55},"description":"Job Details:\nJob Description:\nWe are seeking a skilled and detail-oriented Analog Layout Designer to join our engineering team. In this role, you will be responsible for designing complex layouts of analog signal circuits based on rigorous design specifications. You will execute comprehensive verification flows to ensure top-tier performance, reliability, and manufacturability, while collaborating closely with cross-functional teams to optimize area, power, and yield.\nKey Responsibilities\nLayout & Floorplanning:\nDesign complex layouts of analog signal circuits meeting strict design specifications.\n\nDesign and analyze floorplans, power grids, ESD protection structures, and bumps for analog blocks.\n\nPerform micro-floorplanning and detailed signal planning for complex analog circuits, ensuring proper shielding and device matching for critical signals.\n\nVerification & Reliability:\nRun complete sets of design verification tools to check process design rules (DRC/LVS).\n\nPerform critical reliability checks, including electromigration, voltage drop (IR drop), ESD, and other advanced layout-dependent effects.\n\nMethodology & Innovation:\nDevelop and drive new, innovative analog layout methodologies to continuously improve layout productivity, efficiency, and quality.\n\nTroubleshoot a wide variety of challenges ranging from design anomalies to tool, flow, and methodology issues.\n\nCross-Functional Collaboration:\nPartner with analog circuit designers, process technology teams, and package design engineers to align on specifications and plan deliverables.\n\nNegotiate layout trade-offs effectively to optimize for area, power, reliability, and overall performance.\n\nQualifications:\nExperience: Proven experience in analog and mixed-signal integrated circuit (IC) layout design.\nTechnical Expertise:\nStrong proficiency in custom layout tools (e.g., Cadence Virtuoso or equivalent).\n\nDeep understanding of physical verification tools (Calibre or equivalent) for DRC, LVS, ANT, and ERC.\n\nExpertise in advanced reliability verifications (EM/IR, ESD, thermal effects).\n\nSolid knowledge of advanced semiconductor process nodes and related layout techniques (matching, shielding, guard rings, common-centroid layout).\n\nSoft Skills: Excellent problem-solving abilities, strong communication skills, and the ability to thrive in a collaborative, cross-functional team environment.\nJob Type:\nRegularShift:\nShift 1 (Israel)Primary Location:\nHaifa, IsraelAdditional Locations:\nTLVPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or 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