{"id":3498843,"url":"https://alion.io/job/altera-design-engineer","title":"Design Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":14,"ghost_share":0,"stale_share":0.571,"repost_share":0.071,"time_to_fill_p50_days":56,"computed_at":"2026-11-04T06:34:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":20000,"max_usd":46000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":843},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-30T02:46:57Z","employer_posted_date":"2026-10-30","last_verified_at":"2026-11-04T00:31:39Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"Job Details:\nJob Description:\nAltera is seeking a highly motivated Design Engineer to contribute to the development of cutting-edge FPGA and SoC solutions. In this role, you will be involved in the full design lifecycle, from concept to silicon, ensuring high-quality and high-performance products.\nJob Responsibilities:\nPerform RTL design, verification, and synthesis of complex digital circuits for FPGA and SoC products.\nDevelop and execute comprehensive test plans and verification environments using industry-standard methodologies.\nCollaborate with architecture, validation, and software teams to define specifications and ensure design integrity.\nAnalyze and debug design issues, performing root cause analysis and implementing effective solutions.\nOptimize designs for performance, power, and area targets.\nParticipate in design reviews and contribute to continuous improvement of design methodologies and processes.\nGenerate design documentation, including specifications, test plans, and release notes.\nPreferred to have system level understanding\nProficiency with System Verilog and RTL coding skills, timing closure, or STA, targeting high performance designs· \nVery good understanding of latest protocol specifications for memory, bus protocol specification like AXI, PCIe and Ethernet interfaces, Security IPs (for ex: MACSec)· \nExperience with FPGA tools and timing closure\nHardware power-on and debug· \nNew product release and rollout support· \nCustomer technical support\nQualifications:\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.\n3+ years of experience in digital IC design, with a focus on RTL design and verification.\nProficiency in Verilog or SystemVerilog for RTL design and testbench development.\nExperience with industry-standard EDA tools for simulation, synthesis, and static timing analysis. Strong understanding of digital design fundamentals, including clock domain crossing (CDC) and reset synchronization.\nFamiliarity with scripting languages such as Python or Perl.\nExcellent problem-solving, analytical, and debugging skills.\nStrong communication and interpersonal skills, with the ability to work effectively in a team environment.\nPrior experience with FPGA architectures and design flows is a plus.\nJob Type:\nRegularShift:\nShift 1 (India)Primary Location:\nBengaluru, Karnataka, IndiaAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.","description_format":"text","description_chars":2845,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Cybersecurity","Hardware","Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-30T02:46:57Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":5,"expected_fill_days":56,"reasons":["conf:6","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-04T06:34:25Z"},"pay":null,"html_url":"https://alion.io/job/altera-design-engineer","json_url":"https://alion.io/job/altera-design-engineer.json","meta":{"generated_at":"2026-11-04T10:07:12Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":15705,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":5328},"rest":"https://alion.io/mcp/rest/get_company?id=5328"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Faltera-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Faltera-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Faltera-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/altera-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Faltera-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3498843}},{"tool":"search_jobs","arguments":{"company":"altera.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3498843},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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