{"id":1408245,"url":"https://alion.io/job/altera-high-level-synthesis-hls-compiler-engineer-contract","title":"High Level Synthesis (HLS) Compiler Engineer (Contract)","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":91,"open_postings":16,"ghost_share":0,"stale_share":0.125,"repost_share":0.063,"time_to_fill_p50_days":80,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"contractor","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Toronto, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":96000,"max_usd":181000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":29},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Git","optional":true},{"name":"Intel HLS Compiler","optional":true},{"name":"LLVM","optional":true},{"name":"MLIR","optional":true},{"name":"Verilog","optional":true},{"name":"VHDL","optional":true},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2026-09-28T18:39:46Z","employer_posted_date":"2026-09-28","last_verified_at":"2026-09-30T11:27:54Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nAbout Us:\nAltera is at the forefront of programmable logic and hardware acceleration. Our mission is to empower developers and system architects to rapidly design and deploy cutting-edge solutions using advanced FPGA and SoC technologies. The High Level Synthesis (HLS) team at Altera specializes in creating sophisticated tools and compiler technologies that translate high-level programming languages into efficient hardware implementations. Join us and help shape the future of HLS, enabling faster innovation in fields such as AI, cloud computing, and embedded systems.\nResponsibilities:\nAssist in the development and maintenance of HLS compiler infrastructure. \nSupport the implementation of compiler passes and code transformations to optimize high-level code for hardware synthesis. \nAnalyze and improve compilation flow from C/C++ to hardware description languages. \nResearch in cutting edge compiler technology for AI computation workload \nHelp integrate and test new features in HLS compilers, focusing on performance and resource optimization. \nParticipate in debugging and validating compiler outputs. \nDocument work and contribute to internal knowledge bases. \nWhat We Offer:\nMentorship and hands-on training from experienced compiler and hardware engineers. \nCompetitive salary and benefits. \nOpportunities for professional growth and advancement. \nSupportive and innovative work environment. \nSalary\nOur compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.\nEstimated Salary Range: $100,000 - $130,000 CAD\nWe use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role.\nQualifications:\nMinimum Qualifications\nBachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related field with 3+ years of experience in the following skills:\nAcademic or project experience with C/C++ programming. \nFamiliarity with compiler concepts (parsing, code generation, optimization) through coursework or personal projects. \nExposure to digital logic design fundamentals and hardware flows (FPGA/ASIC) \nPreferred Qualifications\nEagerness to learn about HLS compilers and hardware synthesis. \nGood analytical, communication, and teamwork skills. \nCoursework or internship experience in compiler development or hardware synthesis. \nFamiliarity with MLIR, LLVM, or Clang. \nExposure to HLS tools (e.g., Xilinx Vivado HLS, Intel HLS). \nBasic understanding of hardware description languages (Verilog/VHDL). \nExperience with version control systems (e.g., Git). \nJob Type:\nContract Employee (Fixed Term)Shift:\nShift 1 (Canada)Primary Location:\nToronto, Ontario, CanadaAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.","description_format":"text","description_chars":3553,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Canada","iso":"CA","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-09-28T18:39:46Z"}],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":2,"expected_fill_days":80,"reasons":["conf:18","velocity","win:early","comp:brand"],"computed_at":"2026-10-01T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/altera-high-level-synthesis-hls-compiler-engineer-contract","json_url":"https://alion.io/job/altera-high-level-synthesis-hls-compiler-engineer-contract.json","meta":{"generated_at":"2026-10-01T11:25:53Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3115,"day_limit":5000,"remaining_today":1885,"minute_limit":60,"resets_at":"2026-10-02T00:00:00Z"}}}