{"id":189720,"url":"https://alion.io/job/altera-logic-designer","title":"Logic Designer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":13,"ghost_share":0,"stale_share":0.385,"repost_share":0.077,"time_to_fill_p50_days":60,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Haifa, Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":112000,"max_usd":258000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1777},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Quantization","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-01T00:00:00Z","employer_posted_date":"2026-09-01","last_verified_at":"2026-10-22T15:21:55Z","board_verified":true,"closed_at":null,"days_open":53,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":53},"description":"Job Details:\nJob Description:\nAltera is seeking a highly motivated and skilled Logic Designer to contribute to the development of cutting-edge programmable logic devices. This role involves designing, verifying, and implementing complex digital logic for our next-generation FPGA products.\nJob Title: Senior Logic/DSP Design Engineer - Mixed Signal\nLocation: Israel\nDepartment: Analog Mixed Signal Serdes (AMS)\nAbout the Role\nWe are seeking a Senior Logic/DSP Design Engineer to develop digital logic and DSP algorithms supporting mixed-signal IP blocks (e.g., high-speed SerDes, ADC/DAC digital, calibration engines, and control logic). This role bridges the digital and analog domains - translating system-level and DSP algorithms into synthesizable RTL, and working closely with analog/mixed-signal architects to close the loop on calibration, equalization, and adaptive control.\nKey Responsibilities\nMicro-Architect Design and implement digital logic (RTL) for mixed-signal subsystems - calibration state machines, digital filters, adaptive equalization, clock/data recovery digital loops, etc.\n\nCollaborate with analog design teams to define digital-analog interfaces, calibration flows, and control logic.\n\nPerform RTL-to-gate synthesis, timing closure, and low-power design techniques for mixed-signal digital blocks.\n\nBuild and maintain block level verification environments (Verilog) for digital logic tied to analog behavior (mixed-signal verification, AMS co-simulation).\n\nSupport silicon bring-up and debug - correlating digital logic behavior with analog measurements in the lab.\n\nDocument architecture, algorithms, and design decisions; participate in design and code reviews.\n\nMentor junior engineers on digital design practices within a mixed-signal flow.\n\nQualifications:\nBSC/MSC in Electrical Engineering.\n\n7+ years of experience in digital logic design, with exposure to mixed-signal or DSP projects.\n\nStrong RTL design skills (Verilog) and synthesis flow experience\n\nSolid understanding of DSP fundamentals (filtering, sampling, quantization, timing recovery).\n\nFamiliarity with mixed-signal verification methodologies (AMS simulation, Verilog-AMS, real number modeling).\n\nPreferred Qualifications\nExperience with high-speed SerDes, PCIe, DisplayPort, Ethernet or similar interface standards.\n\nExposure to calibration/adaptationalgorithms for ADCs, DACs, or equalizers.\n\nFamiliarity with low-power design techniques and static timing analysis (STA).\n\nExperience working directly with analog designers on digital-analog co-design.\n\nJob Type:\nRegularShift:\nShift 1 (Israel)Primary Location:\nHaifa, IsraelAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.","description_format":"text","description_chars":3093,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Israel","iso":"IL","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-09-02T10:36:20Z"}],"visa":[],"liveness":{"score":60,"band":"ok","label":"Likely open","p_open":1,"p_active":0.797,"p_room":0.75,"age_days":53,"expected_fill_days":60,"reasons":["conf:38","velocity","win:late","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/altera-logic-designer","json_url":"https://alion.io/job/altera-logic-designer.json","meta":{"generated_at":"2026-10-24T09:16:14Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13354,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":5328},"rest":"https://alion.io/mcp/rest/get_company?id=5328"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Faltera-logic-designer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Faltera-logic-designer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Faltera-logic-designer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/altera-logic-designer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Faltera-logic-designer"}]}