{"id":1063219,"url":"https://alion.io/job/altera-post-silicon-validation-fpga-2","title":"Post-Silicon Validation — FPGA","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":91,"open_postings":15,"ghost_share":0,"stale_share":0.333,"repost_share":0.067,"time_to_fill_p50_days":57,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-09-03T00:00:00Z","employer_posted_date":"2026-09-03","last_verified_at":"2026-10-16T12:06:43Z","board_verified":true,"closed_at":null,"days_open":43,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":43},"description":"Job Details:\nJob Description:\nRole summary\nSupport FPGA-based post-silicon validation: design bring-up, hardware testing (PVT and non-PVT),regression, anddesign/test automation. Build hands-on skill in lab HW, scripting, and RTL-aware debug under senior guidance.\nKey responsibilities\nExecute FPGA post-silicon validation plans: functional, feature,regression, and stress\nSupportdesign bring-up: power-on, clocks, reset, link-up, and basic feature checks\nRunPVT testing(voltage / temperature / corner sweeps) and non-PVT HW tests\nExecute and maintainregressionsuites (manual and automated); triage failures and re-run as needed\nDevelop and maintaindesign/test automationusingPython,Tcl, andCas needed\nRead and useRTLfor debug, signal tracing, and understanding expected behavior\nUse FPGA tools and lab instruments for HW bring-up and failure isolation\nFile clear bugs with logs, setups, and repro steps\nWork with design, DV, and related teams on triage and closure\nDocument procedures, automation, regression results, and status\noft skills\nMethodical, lab-safe, eager to automate repetitive validation and regression work\nQuick learners; owns assigned test, regression, and automation tasks\n\nQualifications:\nRequired qualifications\nB.E. / B.Tech / M.S. in ECE, EE, Computer Engineering, or related\n3-5 years in post-silicon validation, FPGA validation, HW test, or related\nHW knowledge:digital fundamentals, FPGA/SoC basics, lab bring-up comfort\nExperience or coursework exposure totest execution / regression(lab or simulation)\nAutomation:practicalPythonfor test/lab automation and regression runs\nScripting / embedded:TclandCfor tool flows, firmware-style, or board/test control\nRTL:ability to read Verilog/SystemVerilog (or VHDL) and relate failures to design behavior\nFamiliarity with FPGA flows (compile, program, basic on-chip debug)\nClear written communication for bugs and status\nJob Type:\nRegularShift:\nShift 1 (India)Primary Location:\nBengaluru, Karnataka, IndiaAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, 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