{"id":3746219,"url":"https://alion.io/job/altera-product-development-engineer-9","title":"Product Development Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":86,"open_postings":17,"ghost_share":0,"stale_share":0.471,"repost_share":0.118,"time_to_fill_p50_days":53,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":106200,"max":153675,"currency":"USD","period":"year","gross":null,"usd_annual":153675},"salary_estimate":null,"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Tessent","optional":false}],"status":"live","first_seen_at":"2026-11-03T00:00:00Z","employer_posted_date":"2026-11-03","last_verified_at":"2026-11-06T19:19:02Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Job Details:\nJob Description:\nFor decades, Altera has been at the forefront of programmable logic technology. Our commitment to innovation has empowered countless customers to create groundbreaking solutions that have transformed industries.\nJoin us in our journey to becoming the world's #1 FPGA company!\nAltera is searching for a Product Development Engineer to join our Manufacturing Content Development Engineering Group!\nThe Manufacturing Content Development Engineering Group is responsible for architecting, developing, validating and productizing high quality manufacturing test content for FPGAs to screen out any manufacturing defects and thus guaranteeing the highest quality of outgoing parts to customers.\nOther responsibilities of the Product Development Engineer include but are not limited to:\nDevelop and implement DFT strategies for FPGAs, including scan insertion, BIST (Built-In Self-Test), and test compression techniques.\nCollaborate with RTL design and verification teams to ensure testability features are embedded efficiently.\nDefine and implement test plans, patterns, and fault models to ensure optimal test coverage and yield.\nDevelop and maintain MBIST manufacturing test content flows and scripts.\nPerform pre-silicon test pattern simulation and validation to ensure test effectiveness prior to tape-out.\nAnalyze test results, debug silicon failures, and provide root cause analysis.\nWork with manufacturing and test teams to optimize test time, cost, and quality.\nAnalyze early customer returns with emphasis on driving test hole closure activities.\nDrive test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations.\nStay updated with industry trends and emerging DFT/test technologies.\nSalary Range\nThe pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.\n$106,200 - $153,675 USD\nWe use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.\nQualifications:\nMinimum Required Qualifications:\nBachelor's or Master's Degree in Electrical Engineering or related field, with 3+ years of industry experience in the following:\nExperience in IC design and IC test.\nExperience in DFT methodologies such as scan chains, Memory BIST, ATPG, boundary scan, test compression, IJTAG and JTAG networks\nTest development tools (e.g., TessentIJTAG, Tessent MemoryBIST, FastScan, Tessent Shell etc).\nExperience with RTL design, synthesis, and verification flows.\nExperience with fault grading, test time analysis, test coverage analysis, and test yield enhancement.\nScripting skills in Python, Perl, TCL, or similar.\nSemiconductor manufacturing test processes.\nDigital and analog circuit fundamentals.\nPreferred Qualifications:\nMaster's Degree in Electrical Engineering, or equivalent (or other related Engineering degree).\nExperience with Tessent MBIST flows for pattern development and knowledge of memory repair schemes and Memory algorithms is a plus.\nPost-silicon experience including pattern conversion, Automated Test Equipment (ATE) pattern bring-up and silicon characterization is a plus.\nJob Type:\nRegularShift:\nShift 1 (United States of America)Primary Location:\nSan Jose, California, United StatesAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or 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