{"id":2449443,"url":"https://alion.io/job/altera-senior-dft-design-engineer","title":"Senior DFT Design Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":91,"open_postings":15,"ghost_share":0,"stale_share":0.333,"repost_share":0.067,"time_to_fill_p50_days":57,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":187000,"max":270700,"currency":"USD","period":"year","gross":null,"usd_annual":270700},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false}],"status":"live","first_seen_at":"2026-10-13T14:19:20Z","employer_posted_date":"2026-10-13","last_verified_at":"2026-10-13T23:45:31Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Details:\nJob Description:\nAbout the Role:\nThe Altera DFT team is looking for a motivated DFT (Design for Testability) Design Engineer to join an industry-leading IC design organization. This is an opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions that will drive future innovation.\nAs aSenior DFT Design Engineer, you will be responsible for DFT architecture and implementation, including DFT specifications, test logic insertion, test mode timing constraints, ATPG, and pre-silicon validation. You will also contribute to the development of DFT methodologies and flows to improve pre-silicon and post-silicon validation processes.\nThis role provides the opportunity to work closely with IP and integration design teams to understand design and functional behaviors of complex circuits, as well as with test development teams to meet manufacturing test requirements for coverage, cost, yield, and silicon bring-up/debug.\nResponsibilities:\nDefine and implement DFT architectures and specifications for FPGA, processors, DSP, SERDES, IO, and multi-die designs.\nPerform test logic insertion, ATPG pattern generation, and pre-silicon validation for manufacturability and quality.\nCollaborate with IP and integration design teams to align DFT features with design functionality and timing.\nPartner with test development teams to support silicon bring-up, debug, and production readiness.\nContribute to DFT methodology and automation flows to enhance scalability and efficiency.\nEnsure manufacturability goals are met, including test coverage, test cost optimization, yield improvement, and debug support.\nSalary Range\nThe pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.\n$187,000 - $270,700 USD\nWe use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.\nQualifications:\nMinimum Qualifications\nBachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 10+ years of industry experience in the following - OR - Master’s degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of industry experience in the following:\n8+ years of experience in DFT design and verification at both RTL and gate level.\nExperience in EDA tools such as synthesis and scan insertion tools, ATPG tools, simulation and debug tools, STA tools\nDesign automation experience and proficiency in scripting languages such as Perl/TCL\nPreferred Qualifications\nExperience with test compression, BIST (MBIST/LBIST), and advanced fault models.\nPrior experience with 2.5D/3D multi-die designs and high-speed IO/SerDes DFT.\nJob Type:\nRegularShift:\nShift 1 (United States of America)Primary Location:\nSan Jose, California, United StatesAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.","description_format":"text","description_chars":3571,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-13T14:19:20Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 71","filings_12m":71,"filings_prev_12m":39,"green_card_filings_12m":0,"median_offered_wage_usd":157500,"route":null,"cap_exempt":false,"checked_at":"2026-10-03T21:08:04+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)"],"filings_for_role_12m":0}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":57,"reasons":["conf:2","win:early","comp:brand"],"computed_at":"2026-10-14T01:47:47Z"},"pay":{"stated_usd_annual":270700,"is_top_pay":true},"html_url":"https://alion.io/job/altera-senior-dft-design-engineer","json_url":"https://alion.io/job/altera-senior-dft-design-engineer.json","meta":{"generated_at":"2026-10-14T01:47:47Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2624,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":5328},"rest":"https://alion.io/mcp/rest/get_company?id=5328"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Faltera-senior-dft-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Faltera-senior-dft-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Faltera-senior-dft-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/altera-senior-dft-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Faltera-senior-dft-design-engineer"}]}