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Senior Director, Physical Design

Altera · Artificial Intelligence · Cybersecurity · Bachelor's Degree · 2 days ago

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Salary

≈ $26k – $62k per year (Estimated)

Location

In office (Hyderabad)

Seniority

Senior · 15+ years exp

Employment

Full-Time

Confirmed on the employer's own hiring board on Oct 27, 2026. First seen by Alion on Oct 26, 2026. Altera scores A on the Alion truth index.

Overview

Company

Impact

Profile match

Altera

Altera is an American programmable logic company whose field programmable gate array business was founded in 1983, acquired by Intel in 2015 and separated again as a standalone company in 2025 when the private equity firm Silver Lake took a majority stake. It designs FPGAs and structured application specific integrated circuits used where a design must be reconfigurable after manufacture, which makes them common in communications infrastructure, industrial control, automotive, aerospace, defence and test equipment. Headquartered in San Jose, the company sells its Agilex and Cyclone device families alongside the Quartus design software engineers use to program them.

altera.com · HQ: San Jose, United States · Cybersecurity · Hardware · Artificial Intelligence · Processors, MCUs & AI Chips · 1001-5000 employees · Est. 1983

Tech stack of Altera

Backed by Horizon Technology Finance

Job Details:

Job Description:

Altera seeks an experienced Senior Director of Physical Design to lead the physical design strategy and execution of next-generation semiconductor products. This leader will drive innovation in design methodologies, oversee complex chip implementations, and mentor a high-performing team of physical design engineers across multiple product lines.

Key Responsibilities

Lead physical design strategy and execution for advanced-node semiconductor products
Manage and mentor a team of physical design managers, principal engineers, and senior engineers
Establish and drive physical design methodologies, standards, and best practices
Collaborate with cross-functional teams including logic design, DFT, and power management
Drive continuous improvement in design quality, power, performance, and area (PPA)
Manage physical design budgets, schedules, and resource allocation
Evaluate and implement emerging design automation tools and technologies

Partner with vendor ecosystem to optimize tool flows and capabilities

Qualifications:

15+ years of experience in physical design of complex semiconductor products
10+ years in management and team leadership roles
Deep expertise in placement, routing, physical verification, and signoff at 7nm and below nodes
Strong knowledge of design automation tools and methodologies
Proven track record of delivering high-quality silicon within schedule and power budgets
Experience managing large, distributed engineering teams
Bachelor's degree in Electronic Engineering or related field

Preferred Qualifications

Advanced degree (Master's or PhD) in Electronics Engineering
Experience in advanced node physical design at 5nm or below
Background in FPGA or programmable logic design
Experience with multiple foundry relationships (TSMC, Samsung, Intel)
Leadership experience in geographically distributed teams across multiple time zones

Job Type:

Regular

Shift:

Shift 1 (India)

Primary Location:

Regus, Madhapur

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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