{"id":93796,"url":"https://alion.io/job/altera-senior-fpga-design-engineer-2","title":"Senior FPGA Design Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":86,"open_postings":12,"ghost_share":0,"stale_share":0.5,"repost_share":0.083,"time_to_fill_p50_days":56,"computed_at":"2026-10-30T05:48:23Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":21000,"max_usd":57000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-08-19T00:00:00Z","employer_posted_date":"2026-08-19","last_verified_at":"2026-10-30T13:03:39Z","board_verified":true,"closed_at":null,"days_open":72,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":72},"description":"Job Details:\nJob Description:\nWe are seeking an experienced FPGA Design Engineer to develop FPGA-based solutions for pre-silicon validation, hardware prototyping, and high-speed interface verification. The ideal candidate will have a strong digital design background, hands-on FPGA implementation experience, and expertise in high-speed protocols and memory interfaces. This role involves close collaboration with design, verification, firmware, and post-silicon validation teams to accelerate product development and improve design quality.\nKey Responsibilities\nDesign and implement FPGA-based prototypes for ASIC validation and feature development.\nDevelop RTL in Verilog for FPGA implementation.\nIntegrate complex IPs such as DDR, LPDDR, PCIe, Ethernet, CXL, or HBM into FPGA platforms.\nPerform FPGA synthesis, place-and-route, timing closure, and resource optimization.\nDebug FPGA designs using embedded logic analyzers (SignalTap), simulation, and hardware instrumentation.\nDevelop board-level bring-up and validation plans for FPGA platforms.\nCreate automation scripts for FPGA build, regression, and deployment flows using Python, Tcl, or Bash.\nCollaborate with architecture, RTL, verification, firmware, and post-silicon teams to resolve functional and performance issues.\nDrive FPGA methodology improvements, coding standards, and design best practices.\nQualifications:\nBS/MS in Electrical Engineering, Computer Engineering, or a related field.\n8+ years of FPGA design and implementation experience.\nStrong proficiency in Verilog/SystemVerilog and digital logic design.\nExperience with Altera Quartus Prime Pro development environments.\nExperience with FPGA synthesis, timing closure, and implementation.\nStrong understanding of clock domain crossing (CDC), reset synchronization, and timing analysis.\nExperience with high-speed interfaces such as PCIe, DDR4/DDR5, LPDDR4/LPDDR5, Ethernet, AXI, or CXL.\nFamiliarity with simulation tools such as Questa, VCS, or Xcelium.\nExperience with scripting using Python, Tcl, or Bash.\nStrong debugging and problem-solving skills.\nPreferred Qualifications\nExperience with FPGA-based emulation or ASIC prototyping.\nKnowledge of high-speed SerDes architectures.\nExperience with memory controllers and PHY interfaces.\nFamiliarity with UVM-based verification environments.\nExperience with board bring-up, oscilloscopes, protocol analyzers, and logic analyzers.\nKnowledge of embedded processors (ARM, Nios II/V) is a plus.\nWhat You'll Bring\nExcellent analytical and debugging skills.\nAbility to work effectively across architecture, RTL, validation, firmware, and software teams.\nStrong communication skills and the ability to drive technical discussions.\nOwnership mindset with the ability to deliver high-quality solutions in a fast-paced environment.\nJob Type:\nRegularShift:\nShift 1 (India)Primary Location:\nBengaluru, Karnataka, IndiaAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.","description_format":"text","description_chars":3351,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-08-19T00:00:00Z"}],"visa":[],"liveness":{"score":23,"band":"cold","label":"Long shot","p_open":1,"p_active":0.528,"p_room":0.44,"age_days":72,"expected_fill_days":56,"reasons":["conf:3","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-30T05:48:23Z"},"pay":null,"html_url":"https://alion.io/job/altera-senior-fpga-design-engineer-2","json_url":"https://alion.io/job/altera-senior-fpga-design-engineer-2.json","meta":{"generated_at":"2026-10-30T19:18:11Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":8583,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-31T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":5328},"rest":"https://alion.io/mcp/rest/get_company?id=5328"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Faltera-senior-fpga-design-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Faltera-senior-fpga-design-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Faltera-senior-fpga-design-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/altera-senior-fpga-design-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Faltera-senior-fpga-design-engineer-2"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":93796}},{"tool":"search_jobs","arguments":{"company":"altera.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":93796},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}