{"id":2704266,"url":"https://alion.io/job/altera-senior-physical-design-engineer-3","title":"Senior Physical Design Engineer","company":{"id":5328,"name":"Altera","domain":"altera.com","url":"https://alion.io/company/altera","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":91,"open_postings":16,"ghost_share":0,"stale_share":0.313,"repost_share":0.063,"time_to_fill_p50_days":57,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":14500,"max_usd":40000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":23},"experience_years_min":12,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-16T12:06:43Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-16T17:09:23Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Details:\nJob Description:\nAltera is seeking an experienced Physical Design Manager to lead a high-performing team responsible for delivering production-quality physical implementation for advanced semiconductor designs. This role combines technical leadership, people management, cross-functional execution, and ownership of predictable, high-quality tapeout results.\nThe ideal candidate brings deep expertise across the physical design flow, a strong track record managing complex SoC or ASIC programs, and the ability to build an inclusive, accountable engineering culture.\nWhat you will do\nLead, mentor, and grow a team of physical design engineers in Bangalore.\nOwn physical implementation planning and execution from netlist through signoff and tapeout.\nDrive floorplanning, power planning, placement, clock-tree synthesis, routing, optimization, extraction, timing closure, physical verification, and signoff activities.\nEstablish technical direction, project priorities, execution plans, and quality standards for the team.\nPartner closely with RTL design, microarchitecture, DFT, STA, CAD, verification, packaging, and product engineering teams.\nIdentify physical design risks early and lead mitigation plans across schedule, power, performance, area, and manufacturability.\nReview and improve design methodologies, automation, flows, tools, and engineering practices.\nEnsure effective use of metrics, reviews, documentation, and lessons learned to improve predictability and execution quality.\nContribute to staffing plans, capability development, performance management, and succession planning.\nCommunicate technical status, trade-offs, risks, and recommendations clearly to engineering leadership.\nQualifications:\nBachelor’s or master’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.\n12+ years of experience in ASIC or SoC physical design, with significant experience leading teams or major project areas.\nStrong hands-on understanding of the complete physical design flow from synthesis handoff through signoff.\nExperience with floorplanning, power distribution, placement, CTS, routing, timing closure, signal integrity, IR drop, electromigration, physical verification, and design-for-manufacturability considerations.\nDemonstrated experience delivering complex designs to tapeout in advanced process technologies.\nStrong knowledge of timing constraints, multi-voltage or low-power design, ECO implementation, and signoff methodologies.\nExperience collaborating across geographically distributed, cross-functional engineering teams.\nStrong problem-solving, planning, prioritization, communication, and people-leadership skills.\nPreferred qualifications\nExperience with high-performance, high-volume, networking, compute, FPGA, or other complex SoC designs.\nExperience managing multiple projects, blocks, or design programs concurrently.\nFamiliarity with industry-standard implementation and signoff tools, including tools from leading EDA vendors.\nExperience developing automation using Tcl, Python, Perl, or similar scripting languages.\nExperience defining physical design methodologies, flows, dashboards, and productivity improvements.\nTrack record of hiring, developing, and retaining strong engineering teams.\nKnowledge of advanced-node challenges such as congestion, variability, multicorner-multimode closure, and restrictive design rules.\nJob Type:\nRegularShift:\nShift 1 (India)Primary Location:\nBengaluru, Karnataka, IndiaAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or 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