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Location
In office (Toronto)
Seniority
Intern · 1+ year exp
Employment
Internship

Confirmed on the employer's own hiring board on Oct 27, 2026. First seen by Alion on Oct 26, 2026. Altera scores A on the Alion truth index.

Overview
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Altera is an American programmable logic company whose field programmable gate array business was founded in 1983, acquired by Intel in 2015 and separated again as a standalone company in 2025 when the private equity firm Silver Lake took a majority stake. It designs FPGAs and structured application specific integrated circuits used where a design must be reconfigurable after manufacture, which makes them common in communications infrastructure, industrial control, automotive, aerospace, defence and test equipment. Headquartered in San Jose, the company sells its Agilex and Cyclone device families alongside the Quartus design software engineers use to program them.

Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

Join Altera’s Product Architecture and Chip Engineering (PACE) team and help develop cutting-edge FPGA RTL and IP solutions. The PACE team creates comprehensive solutions that give customers easy and efficient access to the capabilities of Altera’s FPGA devices. These solutions are delivered as highly configurable intellectual property (IP) cores, fully integrated with Altera’s Quartus Prime software CAD tool.

Altera's IP cores provide configurable access to the high-speed, high-bandwidth, low-latency interfaces, leveraging dedicated and specialized silicon subsystems in the FPGA. The constantly rising speed and complexity of video, display, and high-speed data transmission interfaces presents a challenging design problem that requires system-level knowledge of silicon, software, IP, and customer applications.

You will work with a team of engineers to develop and verify state-of-the-art PHY-lite, MIPI, and LVDS-based IP cores for high-speed data transmission. You will be working on advanced FPGA architectures, design definition, implementation, and verification. Additionally, you will also be developing design examples and simulation models, accompanied by a rich set of technical documentation. In this role, you will work closely with multiple teams, including silicon design and validation, post-silicon validation, application engineering, and customer experience teams, to ensure seamless development, integration, and optimization of high-speed interface IP solutions.

Your specific responsibilities will include, but are not limited to the following:

  • Architecture and Design based on the latest protocol specifications for video processing, display interfaces, chip-to-chip, and high-speed data transmission interfaces
  • RTL development
  • Device support and CAD tool integration
  • Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)
  • Hardware power-on and debug
  • New product release and rollout support
  • Customer technical support

The candidate should possess the following behavioral traits:

  • Strong skills in communication, initiative, innovation, and teamwork
  • Highly motivated to learn and adapt to fast-changing technologies and environments
  • Excellent problem-solving skills and attention to detail
  • Demonstrate fundamental values such as accountability, integrity, and a winning mindset
  • Collaborative mindset, strong influencing skills, and a willingness to work across geographical locations

Salary

Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.

Estimated Salary Range: $90,000 - $100,000 CAD

We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.

Qualifications:

You mustpossessthe below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.Additionalpreferred qualifications are in addition to theminimumrequirements and are considered a plus factor inidentifyingtop candidates.

Minimum Qualifications:

  • Currently pursuing a BS degree in Computer Engineering, Engineering Science, Electrical Engineering, ComputerScienceor related field

  • 3+ months of experience in Digital logic hardware (e.g.SystemVerilog, Verilog and/or VHDL) design or verification

  • 3+ months of experience in scripting languages and/or software programming (e.g.Python/TCL/Perl and/or C/C++)

Preferred Qualifications:

  • FPGA design experience

  • Experience with RTL simulation, timing closure and static timing analysis

  • Experience with video IPs (MIPI), high speed SerDes IOs and/or physical layer design for chip-to-chip interconnect systems

Job Type:

Student / Intern (Fixed Term)

Shift:

Shift 1 (Canada)

Primary Location:

Toronto, Ontario, Canada

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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