{"id":3641761,"url":"https://alion.io/job/ambarella-verification-engineer-ii-2","title":"Verification Engineer II","company":{"id":1908827,"name":"Ambarella","domain":"ambarella.com","url":"https://alion.io/company/ambarella","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":15,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-11-05T05:54:30Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":120000,"max":160000,"currency":"USD","period":"year","gross":null,"usd_annual":160000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"AI Agents","optional":false},{"name":"C++","optional":false},{"name":"Computer Vision","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-11-02T21:58:12Z","employer_posted_date":"2026-11-02","last_verified_at":"2026-11-05T04:00:17Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"AI Vision Processors For Edge Applications\nOur solutions make cameras smarter by extracting valuable data from high-resolution video streams.\nJob Description\nAmbarella is seeking a motivated Verification Engineer to develop and execute verification solutions for advanced SoCs used in video, image processing, computer vision, and AI applications.\nYou will work with established verification methodologies and modern agentic AI verification flows to develop tests, analyze failures, improve coverage, and accelerate debugging.\nKey Responsibilities\nDevelop and maintain verification testbenches using SystemVerilog, UVM, Verilog, C/C++, and Python.\nCreate and execute verification plans for DSP blocks, control logic, processor cores, and specialized accelerators.\nVerify components of Ambarella's image processing pipeline, video input subsystem, compression engines, and neural network processors.\nDevelop directed and constrained-random tests, assertions, checkers, and coverage models.\nDebug RTL and testbench failures, analyze simulation results, and resolve coverage gaps.\nUse and enhance agentic AI verification workflows for test generation, failure analysis, coverage improvement, and debugging automation.\nDevelop Python scripts and utilities to automate verification and regression tasks.\nCollaborate with RTL design, architecture, and software teams.\nQualifications\nAt least Bachelor’s (preferably Master's) degree in Electrical Engineering, Computer Engineering, or a related field.\nStrong understanding of digital logic design and computer architecture.\nHands-on experience with Verilog/SystemVerilog and simulation-based verification.\nFamiliarity with UVM, constrained-random testing, and functional coverage.\nProgramming skills in Python and/or C/C++.\nStrong debugging, problem-solving, and communication skills.\nThe base range is $120,000-$160,000. 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