{"id":2911320,"url":"https://alion.io/job/amd-asic-emulation-engineer","title":"ASIC Emulation Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":97,"open_postings":17,"ghost_share":0,"stale_share":0.118,"repost_share":0,"time_to_fill_p50_days":49,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":135000,"max_usd":306000,"period":"year","method":"role_country_seniority_unknown","sample_n":3123},"experience_years_min":null,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Cadence Palladium","optional":false},{"name":"Python","optional":false},{"name":"Siemens Veloce","optional":false},{"name":"Synopsys ZeBu","optional":false}],"status":"closed","first_seen_at":"2026-09-10T19:01:00Z","employer_posted_date":"2026-10-31","last_verified_at":"2026-11-04T01:47:01Z","board_verified":false,"closed_at":"2026-11-04T01:47:01Z","days_open":54,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":54},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nMTS SILICON DESIGN ENGINEER\nTHE ROLE:\nAMD’s Network Technologies Solutions Group (NTSG) develops advanced networking silicon and software for data center, cloud, and enterprise infrastructure.\nWe are seeking a hands-on MTS ASIC Emulation Engineer to lead emulation of complex networking subsystems and SoCs using ZeBu, Veloce, and Palladium platforms. You will define emulation strategy, build scalable environments, enable hardware-software co-verification, and drive functional and performance validation before silicon.\nYou will work on next-generation technologies spanning high-speed Ethernet, PCIe, DMA, RDMA, packet processing, traffic management, embedded processors, firmware, and complete system use cases.\nTHE PERSON:\nThe ideal candidate combines deep ASIC knowledge with strong emulation, debug, and software skills. You can take a large design from RTL handoff through compilation, bring-up, workload enablement, regression, performance analysis, and verification closure.\nYou are equally comfortable debugging RTL, transactors, test environments, firmware, software, and system interactions. You remain hands-on while providing technical leadership, improving methodology, and coordinating across architecture, design, DV, firmware, software, FPGA, and silicon-validation teams.\nKEY RESPONSIBILITIES\nEmulation Architecture & Platform Bring-Up\nDefine emulation strategy for complex networking IP, subsystems, and SoCs.\nBring up and deploy designs on ZeBu, Veloce, Palladium, or equivalent platforms.\nDevelop reusable emulation environments, transactors, and infrastructure.\nDrive platform readiness, scalability, stability, and validation closure.\nHardware-Software Co-Verification\nEnable firmware boot, driver development, operating-system bring-up, and system-level workloads prior to silicon.\nDevelop and execute end-to-end validation scenarios spanning hardware, firmware, and software.\nPartner closely with firmware and software teams to accelerate product development and debug.\nNetworking & Performance Validation\nValidate networking and I/O subsystems including Ethernet, PCIe, DMA, RDMA, packet processing, and traffic management.\nExecute long-running workloads and use cases that are impractical in RTL simulation.\nVerify throughput, latency, QoS, congestion, and system-level performance against architectural goals.\nExecution, Debug & Leadership\nDebug complex issues across RTL, emulation infrastructure, firmware, drivers, and software stacks.\nDrive workload enablement, regression health, failure triage, and validation closure.\nCollaborate with architecture, design, verification, and silicon-validation teams.\nMentor engineers and provide technical leadership across emulation activities.\nLANGUAGES & TOOLS\nRequired\nStrong hands-on experience with ZeBu, Veloce, Palladium, or equivalent hardware emulation platforms.\nStrong debug skills spanning RTL, firmware, software, and system-level interactions.\nExperience with transactors, emulation environments, and hardware-software co-verification.\nProficiency in C/C++, Python, Tcl, Shell, or equivalent scripting languages.\nPreferred\nExperience with high-speed Ethernet, RDMA/RoCE, PCIe Gen5/Gen6, or advanced networking architectures.\nExperience with packet-processing pipelines, switch fabrics, traffic managers, schedulers, or QoS architectures.\nExperience with performance validation, silicon bring-up, diagnostics, or post-silicon debug.\nExperience leading technical projects and mentoring engineers \nDeep expertise in one emulation platform and strong system-level debug skills are more important than experience with every platform or technology listed.\nACADEMIC CREDENTIALS\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, with relevant industry experience.\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nMTS SILICON DESIGN ENGINEER\nTHE ROLE:\nAMD’s Network Technologies Solutions Group (NTSG) develops advanced networking silicon and software for data center, cloud, and enterprise infrastructure.\nWe are seeking a hands-on MTS ASIC Emulation Engineer to lead emulation of complex networking subsystems and SoCs using ZeBu, Veloce, and Palladium platforms. You will define emulation strategy, build scalable environments, enable hardware-software co-verification, and drive functional and performance validation before silicon.\nYou will work on next-generation technologies spanning high-speed Ethernet, PCIe, DMA, RDMA, packet processing, traffic management, embedded processors, firmware, and complete system use cases.\nTHE PERSON:\nThe ideal candidate combines deep ASIC knowledge with strong emulation, debug, and software skills. You can take a large design from RTL handoff through compilation, bring-up, workload enablement, regression, performance analysis, and verification closure.\nYou are equally comfortable debugging RTL, transactors, test environments, firmware, software, and system interactions. You remain hands-on while providing technical leadership, improving methodology, and coordinating across architecture, design, DV, firmware, software, FPGA, and silicon-validation teams.\nKEY RESPONSIBILITIES\nEmulation Architecture & Platform Bring-Up\nDefine emulation strategy for complex networking IP, subsystems, and SoCs.\nBring up and deploy designs on ZeBu, Veloce, Palladium, or equivalent platforms.\nDevelop reusable emulation environments, transactors, and infrastructure.\nDrive platform readiness, scalability, stability, and validation closure.\nHardware-Software Co-Verification\nEnable firmware boot, driver development, operating-system bring-up, and system-level workloads prior to silicon.\nDevelop and execute end-to-end validation scenarios spanning hardware, firmware, and software.\nPartner closely with firmware and software teams to accelerate product development and debug.\nNetworking & Performance Validation\nValidate networking and I/O subsystems including Ethernet, PCIe, DMA, RDMA, packet processing, and traffic management.\nExecute long-running workloads and use cases that are impractical in RTL simulation.\nVerify throughput, latency, QoS, congestion, and system-level performance against architectural goals.\nExecution, Debug & Leadership\nDebug complex issues across RTL, emulation infrastructure, firmware, drivers, and software stacks.\nDrive workload enablement, regression health, failure triage, and validation closure.\nCollaborate with architecture, design, verification, and silicon-validation teams.\nMentor engineers and provide technical leadership across emulation activities.\nLANGUAGES & TOOLS\nRequired\nStrong hands-on experience with ZeBu, Veloce, Palladium, or equivalent hardware emulation platforms.\nStrong debug skills spanning RTL, firmware, software, and system-level interactions.\nExperience with transactors, emulation environments, and hardware-software co-verification.\nProficiency in C/C++, Python, Tcl, Shell, or equivalent scripting languages.\nPreferred\nExperience with high-speed Ethernet, RDMA/RoCE, PCIe Gen5/Gen6, or advanced networking architectures.\nExperience with packet-processing pipelines, switch fabrics, traffic managers, schedulers, or QoS architectures.\nExperience with performance validation, silicon bring-up, diagnostics, or post-silicon debug.\nExperience leading technical projects and mentoring engineers \nDeep expertise in one emulation platform and strong system-level debug skills are more important than experience with every platform or technology listed.\nACADEMIC CREDENTIALS\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, with relevant industry experience.\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. 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