{"id":2911303,"url":"https://alion.io/job/amd-cpu-core-staff-dft-engineer","title":"CPU Core Staff DFT Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":97,"open_postings":17,"ghost_share":0,"stale_share":0.118,"repost_share":0,"time_to_fill_p50_days":49,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":174000,"max_usd":321000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":563},"experience_years_min":null,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Perl","optional":false},{"name":"Verilog","optional":false},{"name":"AI Agents","optional":true},{"name":"Tessent","optional":true}],"status":"closed","first_seen_at":"2026-09-11T14:35:00Z","employer_posted_date":"2026-10-31","last_verified_at":"2026-11-04T01:47:01Z","board_verified":false,"closed_at":"2026-11-04T01:47:01Z","days_open":53,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":53},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE:\nAs a member of the Cores DFT Team, the successful candidate will own the ATPG/DFT responsibilities for the next generation of AMD high-performance cores.\nTHE PERSON:\nOur work is a key contributor to delivering a high-quality design and can improve AMD’s operating expenses in the millions. As a senior member of the DFT team, you will work closely with the architecture, IP design, Physical Design teams, and Product engineering teams to achieve first pass silicon success.\nKEY RESPONSIBILITIES:\nExperience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression\nDebug of low coverage, DRC violation fixes and coming upo with efficient and effective solutions for these issues\nProficient in logic design using Verilog\nDebugging complex test pattern issues and simulation failures\nSupport of Silicon bring up activities\nParticipating in post-silicon debug\nComfortable in Linux environment and writing/using scripting languages such as Perl, TCL, etc.\nKnowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time\nExcellent presentation and inter-communication skills\nBachelor's in Electrical Engineering/Computer Engineering\nPREFERRED EXPERIENCE:\nHands-on expertise with commercial test generation tools for large complex designs\nStrong fundamental knowledge of DFT techniques including JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE standards like IEEE 1149.1, 1500, and 1687.\nHave a good understanding of MBIST and LBIST implementations\nExperience with Tessent Scan/ATPG flows\nDirect experience in silicon bring-up, debug, and validation of DFT features on ATE\nExperience with 7nm or smaller process nodes\nExperience in using Agentic AI to develop flows, debug issues and compress timelines for deliverables\nStrong sense of ownership\nPassionate about solving complex problems and self-driven\nACADEMIC CREDENTIALS:\nBachelors or Master'sdegree in computer engineering/Electrical Engineering\nLOCATION:\nSanta Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nAs a member of the Cores DFT Team, the successful candidate will own the ATPG/DFT responsibilities for the next generation of AMD high-performance cores.\nTHE PERSON:\nOur work is a key contributor to delivering a high-quality design and can improve AMD’s operating expenses in the millions. As a senior member of the DFT team, you will work closely with the architecture, IP design, Physical Design teams, and Product engineering teams to achieve first pass silicon success.\nKEY RESPONSIBILITIES:\nExperience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression\nDebug of low coverage, DRC violation fixes and coming upo with efficient and effective solutions for these issues\nProficient in logic design using Verilog\nDebugging complex test pattern issues and simulation failures\nSupport of Silicon bring up activities\nParticipating in post-silicon debug\nComfortable in Linux environment and writing/using scripting languages such as Perl, TCL, etc.\nKnowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time\nExcellent presentation and inter-communication skills\nBachelor's in Electrical Engineering/Computer Engineering\nPREFERRED EXPERIENCE:\nHands-on expertise with commercial test generation tools for large complex designs\nStrong fundamental knowledge of DFT techniques including JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE standards like IEEE 1149.1, 1500, and 1687.\nHave a good understanding of MBIST and LBIST implementations\nExperience with Tessent Scan/ATPG flows\nDirect experience in silicon bring-up, debug, and validation of DFT features on ATE\nExperience with 7nm or smaller process nodes\nExperience in using Agentic AI to develop flows, debug issues and compress timelines for deliverables\nStrong sense of ownership\nPassionate about solving complex problems and self-driven\nACADEMIC CREDENTIALS:\nBachelors or Master'sdegree in computer engineering/Electrical Engineering\nLOCATION:\nSanta Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":6690,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:36:36Z"},{"event":"close","at":"2026-10-31T13:38:47Z"},{"event":"reopen","at":"2026-10-31T17:13:40Z"},{"event":"close","at":"2026-11-04T01:47:01Z"}],"visa":[],"liveness":null,"pay":null,"html_url":"https://alion.io/job/amd-cpu-core-staff-dft-engineer","json_url":"https://alion.io/job/amd-cpu-core-staff-dft-engineer.json","meta":{"generated_at":"2026-11-07T08:43:22Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5664,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-08T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-cpu-core-staff-dft-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-cpu-core-staff-dft-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-cpu-core-staff-dft-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-cpu-core-staff-dft-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-cpu-core-staff-dft-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2911303}},{"tool":"search_jobs","arguments":{"company":"amd.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2911303},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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