{"id":2911358,"url":"https://alion.io/job/amd-failure-analysis-development-engineer-shift-role-2","title":"Failure analysis Development Engineer (Shift role)","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":162,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":29,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":33000,"max_usd":77000,"period":"year","method":"role_country_seniority_unknown","sample_n":1230},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Electron Microscopy (SEM/TEM)","optional":false}],"status":"live","first_seen_at":"2026-09-04T06:06:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-26T13:33:26Z","board_verified":true,"closed_at":null,"days_open":52,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":52},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE\nThe Failure Analysis Engineer will be responsible for investigating yield and reliability issues on advanced microprocessors, graphics processors, and heterogeneous integration products built on leading-edge 3nm FinFET and below technologies. The role involves end-to-end failure analysis, advanced sample preparation, defect localization, and material characterization using state-of-the-art analytical techniques. This individual will work closely with product, process, and manufacturing teams to identify root causes of failures and drive continuous improvements in product quality, yield, and reliability.\nTHE PERSON\nThe ideal candidate is a hands-on semiconductor professional with strong expertise in failure analysis, device physics, and materials characterization. They are comfortable working with advanced analytical tools such as FIB, TEM, AFM, electron microscopy, and nano-probing techniques to solve complex silicon and package-level issues. The successful candidate is detail-oriented, technically curious, and capable of troubleshooting both process and equipment-related challenges. Experience mentoring junior engineers or technicians, combined with the ability to collaborate effectively across engineering and manufacturing teams, will be highly valued.\nKEY RESPONSIBILITIES:\nThe position focuses on the failure analysis of advanced microprocessors and graphics processors based on 3nm FINFET and below technologies.\nPerform comprehensive failure analysis including transistor nano-probing, electrical characterization using AFM, Electron Microscopy and Material Analysis.\nPerform advanced sample preparation for SoIC and other heterogeneous integration products, including planar, cross-sectional and site-specific preparation\nPrepare high-quality site-specific TEM lamellae using focused ion beam techniques for structural, material, interface, and defect characterization\nConduct plasma FIB sample preparation and yield failure analysis on advanced products, including large-volume material removal, defect localization, cross-sectioning, and preparation for downstream analytical techniques\nFollow laboratory safety, EHS, operating procedures, and quality requirements, particularly when operating high-energy beam systems and handling chemicals during night shifts.\nSupport continuous improvement and automation initiatives to increase sample-preparation success rate, throughput, tool utilization, and turnaround time.\nSupport continuous improvement and automation initiatives to increase sample-preparation success rate, throughput, tool utilization, and turnaround time.\nPREFERRED EXPERIENCE:\nAble to work in 12hrs alternate 4days / 3days night shift. Attractive allowance provided.\nPreferable to have mentored / managed junior engineers, associate engineers & technicians.\nCandidate should possess a fundamental understanding of device physics\nA strong background in semiconductor wafer processing and materials characterization is preferred.\nAn ability to perform basic tool troubleshooting and interact with vendor to resolve tool issues.\nCandidates with experience in fabless semiconductor and wafer fabs are highly preferred.\nACADEMIC CREDENTIALS:\nB.Eng in Electrical Engineering, Microelectronics, Materials Engineering and related fields.\nLOCATION:\nSingapore\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE\nThe Failure Analysis Engineer will be responsible for investigating yield and reliability issues on advanced microprocessors, graphics processors, and heterogeneous integration products built on leading-edge 3nm FinFET and below technologies. The role involves end-to-end failure analysis, advanced sample preparation, defect localization, and material characterization using state-of-the-art analytical techniques. This individual will work closely with product, process, and manufacturing teams to identify root causes of failures and drive continuous improvements in product quality, yield, and reliability.\nTHE PERSON\nThe ideal candidate is a hands-on semiconductor professional with strong expertise in failure analysis, device physics, and materials characterization. They are comfortable working with advanced analytical tools such as FIB, TEM, AFM, electron microscopy, and nano-probing techniques to solve complex silicon and package-level issues. The successful candidate is detail-oriented, technically curious, and capable of troubleshooting both process and equipment-related challenges. Experience mentoring junior engineers or technicians, combined with the ability to collaborate effectively across engineering and manufacturing teams, will be highly valued.\nKEY RESPONSIBILITIES:\nThe position focuses on the failure analysis of advanced microprocessors and graphics processors based on 3nm FINFET and below technologies.\nPerform comprehensive failure analysis including transistor nano-probing, electrical characterization using AFM, Electron Microscopy and Material Analysis.\nPerform advanced sample preparation for SoIC and other heterogeneous integration products, including planar, cross-sectional and site-specific preparation\nPrepare high-quality site-specific TEM lamellae using focused ion beam techniques for structural, material, interface, and defect characterization\nConduct plasma FIB sample preparation and yield failure analysis on advanced products, including large-volume material removal, defect localization, cross-sectioning, and preparation for downstream analytical techniques\nFollow laboratory safety, EHS, operating procedures, and quality requirements, particularly when operating high-energy beam systems and handling chemicals during night shifts.\nSupport continuous improvement and automation initiatives to increase sample-preparation success rate, throughput, tool utilization, and turnaround time.\nSupport continuous improvement and automation initiatives to increase sample-preparation success rate, throughput, tool utilization, and turnaround time.\nPREFERRED EXPERIENCE:\nAble to work in 12hrs alternate 4days / 3days night shift. Attractive allowance provided.\nPreferable to have mentored / managed junior engineers, associate engineers & technicians.\nCandidate should possess a fundamental understanding of device physics\nA strong background in semiconductor wafer processing and materials characterization is preferred.\nAn ability to perform basic tool troubleshooting and interact with vendor to resolve tool issues.\nCandidates with experience in fabless semiconductor and wafer fabs are highly preferred.\nACADEMIC CREDENTIALS:\nB.Eng in Electrical Engineering, Microelectronics, Materials Engineering and related fields.\nLOCATION:\nSingapore\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":9068,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Singapore","iso":"SG","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:36:36Z"}],"visa":[],"liveness":{"score":10,"band":"cold","label":"Long shot","p_open":1,"p_active":0.275,"p_room":0.36,"age_days":51,"expected_fill_days":29,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":null,"html_url":"https://alion.io/job/amd-failure-analysis-development-engineer-shift-role-2","json_url":"https://alion.io/job/amd-failure-analysis-development-engineer-shift-role-2.json","meta":{"generated_at":"2026-10-26T15:45:14Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":20991,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-27T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-failure-analysis-development-engineer-shift-role-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-failure-analysis-development-engineer-shift-role-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-failure-analysis-development-engineer-shift-role-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-failure-analysis-development-engineer-shift-role-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-failure-analysis-development-engineer-shift-role-2"}]}