{"id":3549284,"url":"https://alion.io/job/amd-formal-verification-lead","title":"Formal Verification Lead","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":99,"open_postings":65,"ghost_share":0,"stale_share":0.031,"repost_share":0,"time_to_fill_p50_days":53,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":31000,"max_usd":70000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":796},"experience_years_min":13,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Cadence JasperGold","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys VC Formal","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-10-30T20:44:00Z","employer_posted_date":"2026-10-30","last_verified_at":"2026-11-03T22:27:22Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nFormal Verification Lead, CPU Cores\nTHE ROLE:\nAs a Formal Verification Lead, you will provide technical leadership for formal verification of complex, high-performance CPU cores. You will work closely with architects, RTL designers, and verification teams to define and execute formal verification strategies, drive convergence and sign-off, and advance formal methodologies for next-generation processor designs.\nTHE PERSON:\nYou have a passion for processor architecture, digital design, and verification. You are a hands-on technical leader with strong analytical, debugging, and problem-solving skills. You collaborate effectively across architecture, design, and verification teams, influence technical direction, mentor engineers, and drive challenging problems to closure across geographically distributed teams.\nKEY RESPONSIBILITIES:\nLead formal verification strategy and execution for complex CPU blocks and subsystems.\nOwn formal verification from planning and environment development through convergence, coverage closure, and sign-off.\nDevelop and review SystemVerilog Assertions (SVA), properties, assumptions, constraints, abstractions, and formal verification environments.\nPartner with architects and RTL designers to understand design intent, identify corner cases and specification gaps, and improve design verifiability.\nDrive formal convergence and debug through effective abstraction, decomposition, constraints, proof strategies, and tool optimization.\nDefine and drive verification quality metrics including property completeness, proof convergence, formal coverage, and sign-off criteria.\nDrive innovation in formal methodologies, automation, reusable infrastructure, and adoption across CPU development.\nProvide technical leadership through verification reviews, complex problem solving, and mentoring across teams and sites.\nREQUIRED/PREFERRED EXPERIENCE:\n13+ years of relevant industry experience, with substantial experience in formal verification of complex digital designs.\nDemonstrated technical leadership in verification of CPU, processor, IP, or complex subsystems.\nStrong hands-on expertise in formal property verification, SVA, formal environments, constraints, abstraction, convergence, and coverage closure.\nExperience with formal tools such as Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal, or equivalent.\nStrong understanding of SystemVerilog/Verilog RTL, computer architecture, and CPU microarchitecture.\nExperience with CPU areas such as pipelines, execution units, caches, memory subsystems, coherency, or control logic is preferred.\nExperience developing formal methodologies, automation, or reusable verification infrastructure is highly desirable.\nStrong scripting skills using Python, Perl, Tcl, Shell, or similar languages.\nDemonstrated ability to mentor engineers, influence technical direction, and lead cross-functional technical initiatives.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.\n#LI-BM2\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nFormal Verification Lead, CPU Cores\nTHE ROLE:\nAs a Formal Verification Lead, you will provide technical leadership for formal verification of complex, high-performance CPU cores. You will work closely with architects, RTL designers, and verification teams to define and execute formal verification strategies, drive convergence and sign-off, and advance formal methodologies for next-generation processor designs.\nTHE PERSON:\nYou have a passion for processor architecture, digital design, and verification. You are a hands-on technical leader with strong analytical, debugging, and problem-solving skills. You collaborate effectively across architecture, design, and verification teams, influence technical direction, mentor engineers, and drive challenging problems to closure across geographically distributed teams.\nKEY RESPONSIBILITIES:\nLead formal verification strategy and execution for complex CPU blocks and subsystems.\nOwn formal verification from planning and environment development through convergence, coverage closure, and sign-off.\nDevelop and review SystemVerilog Assertions (SVA), properties, assumptions, constraints, abstractions, and formal verification environments.\nPartner with architects and RTL designers to understand design intent, identify corner cases and specification gaps, and improve design verifiability.\nDrive formal convergence and debug through effective abstraction, decomposition, constraints, proof strategies, and tool optimization.\nDefine and drive verification quality metrics including property completeness, proof convergence, formal coverage, and sign-off criteria.\nDrive innovation in formal methodologies, automation, reusable infrastructure, and adoption across CPU development.\nProvide technical leadership through verification reviews, complex problem solving, and mentoring across teams and sites.\nREQUIRED/PREFERRED EXPERIENCE:\n13+ years of relevant industry experience, with substantial experience in formal verification of complex digital designs.\nDemonstrated technical leadership in verification of CPU, processor, IP, or complex subsystems.\nStrong hands-on expertise in formal property verification, SVA, formal environments, constraints, abstraction, convergence, and coverage closure.\nExperience with formal tools such as Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal, or equivalent.\nStrong understanding of SystemVerilog/Verilog RTL, computer architecture, and CPU microarchitecture.\nExperience with CPU areas such as pipelines, execution units, caches, memory subsystems, coherency, or control logic is preferred.\nExperience developing formal methodologies, automation, or reusable verification infrastructure is highly desirable.\nStrong scripting skills using Python, Perl, Tcl, Shell, or similar languages.\nDemonstrated ability to mentor engineers, influence technical direction, and lead cross-functional technical initiatives.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.\n#LI-BM2\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":8592,"description_truncated":false,"requirements":{"experience_years_min":13,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-30T21:59:10Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":3,"expected_fill_days":53,"reasons":["conf:1","velocity","win:early","comp:brand"],"computed_at":"2026-11-03T05:54:40Z"},"pay":null,"html_url":"https://alion.io/job/amd-formal-verification-lead","json_url":"https://alion.io/job/amd-formal-verification-lead.json","meta":{"generated_at":"2026-11-04T00:30:52Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":725,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-formal-verification-lead"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-formal-verification-lead"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-formal-verification-lead"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-formal-verification-lead\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-formal-verification-lead"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3549284}},{"tool":"search_jobs","arguments":{"company":"amd.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3549284},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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