{"id":2910636,"url":"https://alion.io/job/amd-gate-level-design-verification","title":"Gate Level Design Verification","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":162,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":29,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Iași, Romania"],"countries":["RO"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":true},{"name":"Linux","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Ruby","optional":true},{"name":"Siemens ModelSim","optional":true},{"name":"SystemVerilog","optional":true},{"name":"Unix","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-09-30T09:16:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-26T09:13:23Z","board_verified":true,"closed_at":null,"days_open":26,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":26},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nGATE-LEVEL DESIGN VERIFICATION ENGINEER\nTHE ROLE:\nJoin our Design Verification team and contribute to the gate-level validation of next-generation, high-performance x86 processors and related IP. You will gain hands-on experience in post-synthesis verification, low-power validation, simulation, debugging, and automation while collaborating with experienced engineers across design and verification teams.\nTHE PERSON:\nYou are a motivated and detail-oriented engineer with an interest in digital design and hardware verification. You enjoy solving technical problems, investigating unexpected simulation results, and learning how complex processor designs are validated.\nYou have good communication and organizational skills and are comfortable working collaboratively in a technical team environment. You are also curious, willing to learn, and able to approach engineering problems in a structured and methodical way.\nKEY RESPONSIBILITIES:\nContribute to post-synthesis and gate-level verification activities for high-performance microprocessor designs and related IP.\nRun gate-level simulations, analyze results, and assist with debugging functional and design issues.\nSupport gate-level low-power verification and netlist validation activities.\nDevelop and maintain scripts and automation tools used in gate-level build and simulation flows.\nHelp improve verification methodologies, simulation environments, and reusable workflows.\nVerify design behavior against relevant architectural and design specifications.\nCreate and maintain verification documentation, including test plans, testbench information, and methodology guidelines.\nParticipate in technical reviews and share verification findings with peers and relevant stakeholders.\nCollaborate with RTL design, physical design, architecture, IP, methodology, and verification teams.\nContribute to the timely delivery of reliable and high-quality verification results. \nPREFERRED EXPERIENCE:\nKnowledge of a hardware description language such as Verilog or SystemVerilog.\nFamiliarity with hardware simulation tools such as VCS, ModelSim, or similar EDA simulators.\nExperience with scripting languages such as Python, Shell, Perl, or Ruby.\nFamiliarity with Unix or Linux operating environments.\nKnowledge of version-control tools such as Git or Perforce.\nExposure to digital design verification, gate-level simulation, post-synthesis verification, low-power verification, or netlist validation.\nUnderstanding of digital logic, computer architecture, or microprocessor design concepts.\nFamiliarity with x86 architecture or high-performance processor designs is an advantage.\nInterest in developing automation tools that improve verification efficiency and productivity.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nGATE-LEVEL DESIGN VERIFICATION ENGINEER\nTHE ROLE:\nJoin our Design Verification team and contribute to the gate-level validation of next-generation, high-performance x86 processors and related IP. You will gain hands-on experience in post-synthesis verification, low-power validation, simulation, debugging, and automation while collaborating with experienced engineers across design and verification teams.\nTHE PERSON:\nYou are a motivated and detail-oriented engineer with an interest in digital design and hardware verification. You enjoy solving technical problems, investigating unexpected simulation results, and learning how complex processor designs are validated.\nYou have good communication and organizational skills and are comfortable working collaboratively in a technical team environment. You are also curious, willing to learn, and able to approach engineering problems in a structured and methodical way.\nKEY RESPONSIBILITIES:\nContribute to post-synthesis and gate-level verification activities for high-performance microprocessor designs and related IP.\nRun gate-level simulations, analyze results, and assist with debugging functional and design issues.\nSupport gate-level low-power verification and netlist validation activities.\nDevelop and maintain scripts and automation tools used in gate-level build and simulation flows.\nHelp improve verification methodologies, simulation environments, and reusable workflows.\nVerify design behavior against relevant architectural and design specifications.\nCreate and maintain verification documentation, including test plans, testbench information, and methodology guidelines.\nParticipate in technical reviews and share verification findings with peers and relevant stakeholders.\nCollaborate with RTL design, physical design, architecture, IP, methodology, and verification teams.\nContribute to the timely delivery of reliable and high-quality verification results. \nPREFERRED EXPERIENCE:\nKnowledge of a hardware description language such as Verilog or SystemVerilog.\nFamiliarity with hardware simulation tools such as VCS, ModelSim, or similar EDA simulators.\nExperience with scripting languages such as Python, Shell, Perl, or Ruby.\nFamiliarity with Unix or Linux operating environments.\nKnowledge of version-control tools such as Git or Perforce.\nExposure to digital design verification, gate-level simulation, post-synthesis verification, low-power verification, or netlist validation.\nUnderstanding of digital logic, computer architecture, or microprocessor design concepts.\nFamiliarity with x86 architecture or high-performance processor designs is an advantage.\nInterest in developing automation tools that improve verification efficiency and productivity.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. 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