{"id":2912233,"url":"https://alion.io/job/amd-infinity-fabric-senior-staff-pre-si-verification-engineer","title":"Infinity Fabric Senior Staff Pre-Si Verification Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":164,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":29,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":189000,"max_usd":348000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":563},"experience_years_min":null,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Ruby","optional":true},{"name":"SystemC","optional":true},{"name":"Verilog","optional":true},{"name":"Windows","optional":true}],"status":"live","first_seen_at":"2026-05-28T15:14:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-27T18:10:31Z","board_verified":true,"closed_at":null,"days_open":152,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":151},"description":"WHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gamingand embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuityand a shared passion to create something extraordinary. When you join AMD, you’lldiscover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.\nTHE ROLE:\nThe Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.\nTHE PERSON:\nYou have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.\nKEY RESPONSIBILITIES:\nDefine and drive verification strategy for complex GPU features or subsystems with cross-project and cross-product impact\nPartner with architects, RTL, and firmware leads to influence feature definition, implementation approach, and verification readiness early in the design cycle\nOwn verification planning and execution for technically critical areas, including risk identification, trade-off analysis, and mitigation strategies\nLead development of robust, scalable verification environments and methodologies, including directed and constrained-random testing using SystemVerilog and UVM\nSolve complex, ambiguous verification challenges, often requiring new approaches or extensions to existing processes and infrastructure\nAnalyze functional and code coverage at a system level, driving coverage closure strategies that balance quality, schedule, and compute efficiency\nDrive improvements to verification processes, tools, and workflows that increase productivity, quality, or execution efficiency across teams\nCoordinate and technically lead small verification efforts within larger programs, aligning stakeholders and delivering on shared objectives\nMentor and coach junior and senior engineers, acting as a go-to technical resource and influencing best practices across the organization\nPREFERRED EXPERIENCE:\nProficient in IP level ASIC verification\nProficient in debugging firmware and RTL code using simulation tools\nProficient in using UVM testbenches and working in Linux and Windows environments\nExperienced with Verilog, System Verilog, C, and C++\nDeveloping UVM based verification frameworks and testbenches, processes and flows\nAutomating workflows in a distributed compute environment.\nExposure to simulation profile, efficiency improvement, acceleration, HLS tools/process\nGood understanding and hands-on experience in the UVM concepts and SystemVerilog language\nGood working knowledge of SystemC and TLM with some related experience.\nScripting language experience: Perl, Ruby, Makefile, shell preferred.\nExperience working with complex designs (not just I2C and other similar designs).\nACADEMIC CREDENTIALS:\nBS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.\nLOCATION: Santa Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nThe Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.\nTHE PERSON:\nYou have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.\nKEY RESPONSIBILITIES:\nDefine and drive verification strategy for complex GPU features or subsystems with cross-project and cross-product impact\nPartner with architects, RTL, and firmware leads to influence feature definition, implementation approach, and verification readiness early in the design cycle\nOwn verification planning and execution for technically critical areas, including risk identification, trade-off analysis, and mitigation strategies\nLead development of robust, scalable verification environments and methodologies, including directed and constrained-random testing using SystemVerilog and UVM\nSolve complex, ambiguous verification challenges, often requiring new approaches or extensions to existing processes and infrastructure\nAnalyze functional and code coverage at a system level, driving coverage closure strategies that balance quality, schedule, and compute efficiency\nDrive improvements to verification processes, tools, and workflows that increase productivity, quality, or execution efficiency across teams\nCoordinate and technically lead small verification efforts within larger programs, aligning stakeholders and delivering on shared objectives\nMentor and coach junior and senior engineers, acting as a go-to technical resource and influencing best practices across the organization\nPREFERRED EXPERIENCE:\nProficient in IP level ASIC verification\nProficient in debugging firmware and RTL code using simulation tools\nProficient in using UVM testbenches and working in Linux and Windows environments\nExperienced with Verilog, System Verilog, C, and C++\nDeveloping UVM based verification frameworks and testbenches, processes and flows\nAutomating workflows in a distributed compute environment.\nExposure to simulation profile, efficiency improvement, acceleration, HLS tools/process\nGood understanding and hands-on experience in the UVM concepts and SystemVerilog language\nGood working knowledge of SystemC and TLM with some related experience.\nScripting language experience: Perl, Ruby, Makefile, shell preferred.\nExperience working with complex designs (not just I2C and other similar designs).\nACADEMIC CREDENTIALS:\nBS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.\nLOCATION: Santa Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":8667,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:52:16Z"}],"visa":[],"liveness":{"score":9,"band":"cold","label":"Long shot","p_open":1,"p_active":0.333,"p_room":0.28,"age_days":151,"expected_fill_days":29,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-27T05:46:45Z"},"pay":null,"html_url":"https://alion.io/job/amd-infinity-fabric-senior-staff-pre-si-verification-engineer","json_url":"https://alion.io/job/amd-infinity-fabric-senior-staff-pre-si-verification-engineer.json","meta":{"generated_at":"2026-10-27T21:26:38Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":12852,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-infinity-fabric-senior-staff-pre-si-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-infinity-fabric-senior-staff-pre-si-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-infinity-fabric-senior-staff-pre-si-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-infinity-fabric-senior-staff-pre-si-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-infinity-fabric-senior-staff-pre-si-verification-engineer"}]}