1,898,539open jobs
111,452companies
254,609added this week
Browse all
Salary
≈ $28k – $64k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Staff

Confirmed on the employer's own hiring board on Oct 21, 2026. First seen by Alion on Oct 19, 2026.

Overview
Company
Impact
Profile match

AMD

AMD is an American semiconductor company founded in 1969 and headquartered in Santa Clara, California, that designs processors, graphics chips and adaptive computing hardware without owning fabrication plants. Its Ryzen and Threadripper processors and Radeon graphics serve consumers and creators, EPYC server chips have taken a large share of the data centre market from Intel, and the Instinct accelerators compete for AI training and inference workloads. The 2022 acquisition of Xilinx added field-programmable gate arrays and adaptive systems on chip, and the company also supplies the custom silicon inside the PlayStation and Xbox consoles.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

Lead DFT ENGINEER

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

  • Implementation and verification of DFT architecture and features
  • Scan insertion and ATPG pattern generation
  • ATPG patterns verification with gate-level simulation
  • Test coverage and test cost reduction analysis
  • Post silicon support to ensure successful bring up and enhance yield learning

PREFERRED EXPERIENCE:

  • Understanding of Design forTest methodologies and DFT verificationexperience (eg.IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
  • Experience with Mentor testkompressand/or Synopsys Tetramax/DFTMAX
  • Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

  • Bachelors or Mastersdegree in computer engineering/Electrical Engineering
  • #LI-SR5

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Lead DFT ENGINEER

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

  • Implementation and verification of DFT architecture and features
  • Scan insertion and ATPG pattern generation
  • ATPG patterns verification with gate-level simulation
  • Test coverage and test cost reduction analysis
  • Post silicon support to ensure successful bring up and enhance yield learning

PREFERRED EXPERIENCE:

  • Understanding of Design forTest methodologies and DFT verificationexperience (eg.IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
  • Experience with Mentor testkompressand/or Synopsys Tetramax/DFTMAX
  • Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

  • Bachelors or Mastersdegree in computer engineering/Electrical Engineering
  • #LI-SR5

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,898,539 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware
Similar stack
Same company
Bengaluru
≈ $32k – $66k per year (Estimated) • In office • Full-Time • 4+ years exp • Bachelor's Degree • Hyderabad
SystemVerilog
Chips/EDA
UVM
Apply
≈ $36k – $81k per year (Estimated) • Hybrid • Full-Time • 12+ years exp • Bachelor's Degree • Bengaluru
Python
C++
DevOps
Linux
Apply
≈ $27k – $57k per year (Estimated) • In office • Full-Time • 6+ years exp • PhD • Bengaluru • Gandhinagar • Hyderabad
Python
C++
SystemC
C++
CMake
DevOps
GitHub Actions
RTOS
CI/CD
Jenkins
Git
QEMU
Linux
Cybersecurity
Shift-Left Security
Management
Agile
Apply
Lead Hardware Engr 9 hours ago
≈ $25k – $57k per year (Estimated) • In office • 15+ years exp • Bachelor's Degree • Bengaluru
Chips/EDA
LTspice
Mentor Xpedition
Analytics
Microsoft Excel
SpaceTech
DO-160
Apply
≈ $29k – $59k per year (Estimated) • In office • Full-Time • 10+ years exp • Bachelor's Degree • Pune
C
C++
C
Embedded C
AI/ML
Copilot
DevOps
RTOS
CI/CD
GitHub
Cybersecurity
SBOM
Management
Agile
SpaceTech
FMEA
MedTech
ISO 13485
ISO 14971
IEC 62304
EU MDR
CAPA
Apply
≈ $17k – $42k per year (Estimated) • In office • Full-Time • 5+ years exp • Master's Degree • Bengaluru • Hyderabad
Verilog
SystemVerilog
DevOps
Unix
Chips/EDA
Siemens QuestaSim
UVM
Apply
≈ $16k – $43k per year (Estimated) • In office • Full-Time • 6+ years exp • Bachelor's Degree • Bengaluru
Analytics
Microsoft Excel
Design
Canva
Apply
≈ $11k – $30k per year (Estimated) • In office • Full-Time • Bengaluru • Mumbai • Pune • Noida • Gurgaon
Apply
≈ $18k – $45k per year (Estimated) • Remote (India) • Full-Time • 10+ years exp • Master's Degree • Bengaluru • Mumbai • Pune • Noida • Gurgaon
SpaceTech
QGIS
Apply
≈ $5k – $10k per year (Estimated) • Remote (India) • Full-Time • 2+ years exp • Bengaluru • Mumbai
SpaceTech
QGIS
Apply
See all jobs
This is one of many
1,898,539 more open roles from verified company boards, updated every day.