{"id":2911981,"url":"https://alion.io/job/amd-memory-compiler-support-and-development-lead","title":"Memory Compiler Support and Development Lead","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":162,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":29,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Markham, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":89000,"max_usd":167000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":19},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":true},{"name":"Unix","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-07-22T21:54:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-27T00:07:26Z","board_verified":true,"closed_at":null,"days_open":96,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":95},"description":"WHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gamingand embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuityand a shared passion to create something extraordinary. When you join AMD, you’lldiscover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.\n THE ROLE:\nOur team is responsible for delivering and supporting 3rd Party IPs such as SRAM & ROM compilers, in addition to inhouse Macro/IP development. All IPs need to meet AMD’s functionality, performance, and technology requirements while integrating seamlessly within the AMD design ecosystem. We are exposed to bleeding edge technologies and play a major role in shaping AMD’s roadmap and future products.\nThe focus of this role is to be the primary technical interface with a 3rd-party vendor supplying compiled memories. The candidate will be responsible to ensure that all memories used within AMD are compliant to our stringent requirements and will not present any issues to customers that use them. In addition, there may be opportunity to lead development of custom memory compilers for specialized applications.\nTHE PERSON:\nYou have a passion for modern, complex processor architecture, digital and memory design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.\nKEY RESPONSIBILITIES:\nOwns definition/quality/delivery/support for multiple memory compilers for all AMD products\nCollaborate with architects, hardware engineers, and firmware engineers to understand feature and timing requirements\nLead discussions for next-generation memory requirements with a 3rd-party vendor, and ensuring sufficient silicon validation is achieved\nLead inhouse memory compiler development\nPREFERRED EXPERIENCE:\nProficient understanding of ROM/SRAM/TCAM architecture, operation, and requirements\nExpertise in basic Memory validation - including DFM, DRC, ERC, Functionality, LVS, Spice Checks, Trend Analysis\nExperience in enhanced Memory validation - including EMIR analysis, Physical Integration, Rout ability, and Spice Characterization\nWorking knowledge of Verilog, liberty files, spice simulation, and ASIC design flows\nComfortable with script programming, such as, C-shell, Makefile, Perl, or TCL languages in a UNIX environment\nMemory (compiler) and physical design\nACADEMIC CREDENTIALS:\nBachelors or Mastersdegree in computer engineering/Electrical Engineering\nLOCATION:\nMarkham, ON\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nOur team is responsible for delivering and supporting 3rd Party IPs such as SRAM & ROM compilers, in addition to inhouse Macro/IP development. All IPs need to meet AMD’s functionality, performance, and technology requirements while integrating seamlessly within the AMD design ecosystem. We are exposed to bleeding edge technologies and play a major role in shaping AMD’s roadmap and future products.\nThe focus of this role is to be the primary technical interface with a 3rd-party vendor supplying compiled memories. The candidate will be responsible to ensure that all memories used within AMD are compliant to our stringent requirements and will not present any issues to customers that use them. In addition, there may be opportunity to lead development of custom memory compilers for specialized applications.\nTHE PERSON:\nYou have a passion for modern, complex processor architecture, digital and memory design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.\nKEY RESPONSIBILITIES:\nOwns definition/quality/delivery/support for multiple memory compilers for all AMD products\nCollaborate with architects, hardware engineers, and firmware engineers to understand feature and timing requirements\nLead discussions for next-generation memory requirements with a 3rd-party vendor, and ensuring sufficient silicon validation is achieved\nLead inhouse memory compiler development\nPREFERRED EXPERIENCE:\nProficient understanding of ROM/SRAM/TCAM architecture, operation, and requirements\nExpertise in basic Memory validation - including DFM, DRC, ERC, Functionality, LVS, Spice Checks, Trend Analysis\nExperience in enhanced Memory validation - including EMIR analysis, Physical Integration, Rout ability, and Spice Characterization\nWorking knowledge of Verilog, liberty files, spice simulation, and ASIC design flows\nComfortable with script programming, such as, C-shell, Makefile, Perl, or TCL languages in a UNIX environment\nMemory (compiler) and physical design\nACADEMIC CREDENTIALS:\nBachelors or Mastersdegree in computer engineering/Electrical Engineering\nLOCATION:\nMarkham, ON\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":7294,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:44:57Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.407,"p_room":0.28,"age_days":95,"expected_fill_days":29,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":null,"html_url":"https://alion.io/job/amd-memory-compiler-support-and-development-lead","json_url":"https://alion.io/job/amd-memory-compiler-support-and-development-lead.json","meta":{"generated_at":"2026-10-27T03:30:55Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2868,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-memory-compiler-support-and-development-lead"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-memory-compiler-support-and-development-lead"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-memory-compiler-support-and-development-lead"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-memory-compiler-support-and-development-lead\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-memory-compiler-support-and-development-lead"}]}