{"id":2911959,"url":"https://alion.io/job/amd-pcie-cxl-and-highspeed-io-validation-engineer","title":"PCIe, CXL and Highspeed IO Validation Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":97,"open_postings":17,"ghost_share":0,"stale_share":0.118,"repost_share":0,"time_to_fill_p50_days":49,"computed_at":"2026-11-10T06:52:35Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":112000,"max_usd":211000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":6333},"experience_years_min":7,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Windows","optional":true}],"status":"closed","first_seen_at":"2026-07-28T18:24:00Z","employer_posted_date":"2026-11-03","last_verified_at":"2026-11-04T01:47:01Z","board_verified":false,"closed_at":"2026-11-04T01:47:01Z","days_open":98,"trust":{"level":"ok","repost_count":0,"flags":[],"days_open":97},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.\nAMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.\nPCIe, CXL and Highspeed IO Validation Engineer\nTHE ROLE:\nWe are looking for a dynamic, energetic, and visionary principal validation engineer to join our growing datacenter CPU post silicon validation team, in particular in the areas of highspeed IO such as PCI Express and Compute Express Link (CXL), multi-socket and inter-die interfaces. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.\nKEY RESPONSIBILITIES:\nDevelop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products for High-Speed IO\nDevelop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing\nDevelop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)\nTest interactions between various SoC features using validation infrastructure\nDebug and drive root-cause analysis for SoC related issues\nCollaborate with cross-functional teams in developing tools to improve SoC validation and debug\nWork with cross-functional teams to improve post-silicon validation test strategy, methodology, and process\nPREFERRED EXPERIENCE:\nProven hands on experience in soc design or validation of high speed IO interfaces\nHas experience in PCIe Gen5/6+, CXL, UCIe or proprietary inter-die and multi-socket server interface in either electrical or functional or both. \nUnderstanding of modern x86 microprocessor architecture and Server platform architecture is highly desired\nExperience developing validation methodologies and infrastructure\nTest plan and workload development experience\nParticipated in silicon bring up and debug, support to internal engineering teams\nAble to execute and drive success of programs with multiple projects on the go\nDebug skills at both SoC and system level\nFamiliarity with programming / scripting language (C/C++, Python, Perl, ...)\nWorking knowledge of Server OSes (Linux, Windows)\nMust be a self-starting team player with excellent communication skills who can work with minimal guidance\nForward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement\nStrong verbal and written English communication skills\nExtensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc. \nExtensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization \nExtensive knowledge of system architecture, technical debug, and validation strategy \nStrong analytical/problem-solving skills and pronounced attention to details\nACADEMIC CREDENTIALS:\nBSEE/CSE/CS with 7+ years of experience or\nMSEE/CSE/CS with 5+ years of experience\nLOCATION:\nAustin, TX\nSanta Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nPCIe, CXL and Highspeed IO Validation Engineer\nTHE ROLE:\nWe are looking for a dynamic, energetic, and visionary principal validation engineer to join our growing datacenter CPU post silicon validation team, in particular in the areas of highspeed IO such as PCI Express and Compute Express Link (CXL), multi-socket and inter-die interfaces. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.\nKEY RESPONSIBILITIES:\nDevelop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products for High-Speed IO\nDevelop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing\nDevelop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)\nTest interactions between various SoC features using validation infrastructure\nDebug and drive root-cause analysis for SoC related issues\nCollaborate with cross-functional teams in developing tools to improve SoC validation and debug\nWork with cross-functional teams to improve post-silicon validation test strategy, methodology, and process\nPREFERRED EXPERIENCE:\nProven hands on experience in soc design or validation of high speed IO interfaces\nHas experience in PCIe Gen5/6+, CXL, UCIe or proprietary inter-die and multi-socket server interface in either electrical or functional or both. \nUnderstanding of modern x86 microprocessor architecture and Server platform architecture is highly desired\nExperience developing validation methodologies and infrastructure\nTest plan and workload development experience\nParticipated in silicon bring up and debug, support to internal engineering teams\nAble to execute and drive success of programs with multiple projects on the go\nDebug skills at both SoC and system level\nFamiliarity with programming / scripting language (C/C++, Python, Perl, ...)\nWorking knowledge of Server OSes (Linux, Windows)\nMust be a self-starting team player with excellent communication skills who can work with minimal guidance\nForward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement\nStrong verbal and written English communication skills\nExtensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc. \nExtensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization \nExtensive knowledge of system architecture, technical debug, and validation strategy \nStrong analytical/problem-solving skills and pronounced attention to details\nACADEMIC CREDENTIALS:\nBSEE/CSE/CS with 7+ years of experience or\nMSEE/CSE/CS with 5+ years of experience\nLOCATION:\nAustin, TX\nSanta Clara, CA\nThis role is not eligible for visa sponsorship.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":8932,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":true}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:44:57Z"},{"event":"close","at":"2026-10-31T02:11:15Z"},{"event":"reopen","at":"2026-10-31T06:09:31Z"},{"event":"close","at":"2026-10-31T09:50:42Z"},{"event":"reopen","at":"2026-10-31T20:55:29Z"},{"event":"close","at":"2026-11-01T10:01:16Z"},{"event":"reopen","at":"2026-11-01T14:06:37Z"},{"event":"close","at":"2026-11-02T00:03:04Z"},{"event":"reopen","at":"2026-11-02T09:29:27Z"},{"event":"close","at":"2026-11-02T16:06:30Z"},{"event":"reopen","at":"2026-11-03T02:35:02Z"},{"event":"close","at":"2026-11-04T01:47:01Z"}],"visa":[],"liveness":null,"pay":null,"html_url":"https://alion.io/job/amd-pcie-cxl-and-highspeed-io-validation-engineer","json_url":"https://alion.io/job/amd-pcie-cxl-and-highspeed-io-validation-engineer.json","meta":{"generated_at":"2026-11-10T21:39:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":513,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-pcie-cxl-and-highspeed-io-validation-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-pcie-cxl-and-highspeed-io-validation-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-pcie-cxl-and-highspeed-io-validation-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-pcie-cxl-and-highspeed-io-validation-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-pcie-cxl-and-highspeed-io-validation-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2911959}},{"tool":"search_jobs","arguments":{"company":"amd.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2911959},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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