{"id":2909976,"url":"https://alion.io/job/amd-pd-engineer-2","title":"PD Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":171,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-10-28T05:59:10Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-10-15T14:48:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-28T17:37:04Z","board_verified":true,"closed_at":null,"days_open":13,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":13},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nIR/EM Lead\nJob Summary\nThe IR/EM Lead will drive reliability signoff and closure for advanced SoC and IP designs, ensuring robust power delivery and electromigration compliance across all project phases. This role requires deep expertise in power integrity, IR drop analysis, electromigration verification, methodology development, and cross-functional technical leadership to enable successful tapeouts at advanced process technologies.\nKey Responsibilities\nLead all IR/EM activities for complex SoC and IP programs from floorplan through tapeout.\nDefine and drive project-wide IR/EM closure strategies, schedules, and signoff criteria.\nPerform and review static and dynamic IR-drop analysis across full-chip and block-level designs.\nLead electromigration analysis and closure for power grids, clock networks, signal routing, and package interfaces.\nCollaborate closely with Physical Design, Package Design, Power Architecture, Clock, RTL, CAD, and Technology teams.\nIdentify power integrity risks early and drive mitigation plans through implementation and signoff stages.\nDevelop and deploy methodologies, automation, dashboards, and best practices to improve IR/EM convergence.\nGuide teams in power grid architecture, decap planning, bump assignment, power distribution optimization, and reliability improvements.\nDrive technical reviews and communicate design health, risks, and recommendations to project leadership.\nMentor engineers and provide technical leadership across multiple projects.\nTechnical Requirements\nStrong expertise in Power Integrity and Electromigration analysis methodologies.\nDeep understanding of:Static and Dynamic IR Analysis\nElectromigration Verification\nPower Grid Design and Optimization\nDecap Planning and Analysis\nVoltage Drop Debug and Closure\nAdvanced Node Reliability Requirements\n\nHands-on experience with industry-standard IR/EM signoff tools.\nStrong scripting and automation skills (Python, Tcl, Perl, or similar).\nStrong understanding of advanced-node physical design implementation flows.\nLeadership Expectations\nAct as the primary technical owner for IR/EM signoff and closure.\nDrive technical decisions impacting product reliability and design quality.\nInfluence implementation methodology across project and organizational boundaries.\nLead root-cause analysis for power integrity issues and drive systematic improvements.\nCoach engineers and establish technical best practices for reliability signoff.\nQualifications\nBS/MS in Electrical Engineering, Computer Engineering, or related discipline.\nTypically 5-15 years of experience in Physical Design, Power Integrity, Reliability Analysis, or Signoff Engineering.\nProven experience leading IR/EM closure for large SoC designs through successful tapeout.\nPreferred Qualifications\nExperience with 5nm, 4nm, 3nm, or newer process technologies.\nUnderstanding of package and system-level power delivery networks.\nFamiliarity with thermal analysis and reliability methodologies.\nExperience developing automation and signoff productivity frameworks.\nStrong communication and project leadership skills.\nSuccess Metrics\nFirst-pass IR/EM signoff readiness.\nTimely closure of power integrity and reliability issues.\nImproved methodology efficiency and signoff turnaround time.\nReduced late-stage design risk and tapeout escapes.\nEffective mentorship and technical leadership across the organization.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nIR/EM Lead\nJob Summary\nThe IR/EM Lead will drive reliability signoff and closure for advanced SoC and IP designs, ensuring robust power delivery and electromigration compliance across all project phases. This role requires deep expertise in power integrity, IR drop analysis, electromigration verification, methodology development, and cross-functional technical leadership to enable successful tapeouts at advanced process technologies.\nKey Responsibilities\nLead all IR/EM activities for complex SoC and IP programs from floorplan through tapeout.\nDefine and drive project-wide IR/EM closure strategies, schedules, and signoff criteria.\nPerform and review static and dynamic IR-drop analysis across full-chip and block-level designs.\nLead electromigration analysis and closure for power grids, clock networks, signal routing, and package interfaces.\nCollaborate closely with Physical Design, Package Design, Power Architecture, Clock, RTL, CAD, and Technology teams.\nIdentify power integrity risks early and drive mitigation plans through implementation and signoff stages.\nDevelop and deploy methodologies, automation, dashboards, and best practices to improve IR/EM convergence.\nGuide teams in power grid architecture, decap planning, bump assignment, power distribution optimization, and reliability improvements.\nDrive technical reviews and communicate design health, risks, and recommendations to project leadership.\nMentor engineers and provide technical leadership across multiple projects.\nTechnical Requirements\nStrong expertise in Power Integrity and Electromigration analysis methodologies.\nDeep understanding of:Static and Dynamic IR Analysis\nElectromigration Verification\nPower Grid Design and Optimization\nDecap Planning and Analysis\nVoltage Drop Debug and Closure\nAdvanced Node Reliability Requirements\n\nHands-on experience with industry-standard IR/EM signoff tools.\nStrong scripting and automation skills (Python, Tcl, Perl, or similar).\nStrong understanding of advanced-node physical design implementation flows.\nLeadership Expectations\nAct as the primary technical owner for IR/EM signoff and closure.\nDrive technical decisions impacting product reliability and design quality.\nInfluence implementation methodology across project and organizational boundaries.\nLead root-cause analysis for power integrity issues and drive systematic improvements.\nCoach engineers and establish technical best practices for reliability signoff.\nQualifications\nBS/MS in Electrical Engineering, Computer Engineering, or related discipline.\nTypically 5-15 years of experience in Physical Design, Power Integrity, Reliability Analysis, or Signoff Engineering.\nProven experience leading IR/EM closure for large SoC designs through successful tapeout.\nPreferred Qualifications\nExperience with 5nm, 4nm, 3nm, or newer process technologies.\nUnderstanding of package and system-level power delivery networks.\nFamiliarity with thermal analysis and reliability methodologies.\nExperience developing automation and signoff productivity frameworks.\nStrong communication and project leadership skills.\nSuccess Metrics\nFirst-pass IR/EM signoff readiness.\nTimely closure of power integrity and reliability issues.\nImproved methodology efficiency and signoff turnaround time.\nReduced late-stage design risk and tapeout escapes.\nEffective mentorship and technical leadership across the organization.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. 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