{"id":2909975,"url":"https://alion.io/job/amd-pd-engineer","title":"PD Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":95,"open_postings":8,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":81,"computed_at":"2026-11-02T06:13:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens Calibre","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys IC Validator","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Synopsys StarRC","optional":false}],"status":"live","first_seen_at":"2026-10-15T15:01:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-11-02T13:47:04Z","board_verified":true,"closed_at":null,"days_open":17,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":17},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nPhysical Design Lead Job Summary\nWe are seeking a highly motivated Physical Design Engineer to join our Silicon Design team. The candidate will be responsible for implementing high-performance ASIC/SoC blocks from synthesis to tapeout while meeting timing, power, area, and reliability targets. The role requires strong expertise in physical design methodologies, EDA tools, and advanced technology nodes.\nKey Responsibilities\nPerform physical implementation of digital blocks from netlist to GDSII.\nExecute and optimize:\nFloorplanning\nPower Planning\nPlacement\nClock Tree Synthesis (CTS)\nRouting\nTiming Closure\nPhysical Verification\nAnalyze and close:\nSetup and Hold timing violations\nSignal Integrity issues\nCrosstalk violations\nIR Drop and Electromigration (EM)\nDRC/LVS violations\nWork closely with RTL, Synthesis, DFT, STA, Power, and Verification teams.\nDevelop methodologies and automation scripts to improve PD productivity.\nSupport tapeout activities and signoff closure.\nDebug physical design issues across advanced technology nodes (5nm/3nm/2nm as applicable).\nRequired Qualifications\nEducation\nBachelor's or Master's degree in:\nElectronics Engineering\nElectrical Engineering\nVLSI Design\nComputer Engineering\nTechnical Skills\nPhysical Design Flow\nRTL-to-GDSII implementation\nFloorplanning\nPower Grid Design\nPlacement Optimization\nCTS\nRouting\nECO Implementation\nTiming Closure\nTiming Analysis\nStatic Timing Analysis (STA)\nOCV/AOCV/POCV concepts\nMulti-mode Multi-corner (MMMC) analysis\nTiming Signoff Closure\nPhysical Verification\nDRC/LVS\nAntenna Checks\nDensity Checks\nLEC awareness\nLow Power Design\nUPF/CPF concepts\nPower gating\nMulti-voltage methodologies\nRetention and Isolation strategies\nScripting\nStrong scripting skills in:\nTcl\nPerl\nPython\nShell scripting\nEDA Tools Experience\nExperience with one or more:\nSynopsys\nICC2\nFusion Compiler\nPrimeTime\nStarRC\nIC Validator\nCadence\nInnovus\nTempus\nVoltus\nGenus\nSiemens/Mentor\nCalibre DRC/LVS\nPreferred Qualifications\nExperience with advanced technology nodes (16nm/7nm/5nm/3nm).\nKnowledge of high-performance DDR, CPU, GPU, PCIE, AI/ML, Networking, or Data Center SoCs.\nUnderstanding of package and chiplet integration concepts.\nExperience in hierarchical and full-chip implementation flows.\nStrong debugging and problem-solving skills.\nExcellent communication and collaboration abilities.\n#LI-BM2\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nPhysical Design Lead Job Summary\nWe are seeking a highly motivated Physical Design Engineer to join our Silicon Design team. The candidate will be responsible for implementing high-performance ASIC/SoC blocks from synthesis to tapeout while meeting timing, power, area, and reliability targets. The role requires strong expertise in physical design methodologies, EDA tools, and advanced technology nodes.\nKey Responsibilities\nPerform physical implementation of digital blocks from netlist to GDSII.\nExecute and optimize:\nFloorplanning\nPower Planning\nPlacement\nClock Tree Synthesis (CTS)\nRouting\nTiming Closure\nPhysical Verification\nAnalyze and close:\nSetup and Hold timing violations\nSignal Integrity issues\nCrosstalk violations\nIR Drop and Electromigration (EM)\nDRC/LVS violations\nWork closely with RTL, Synthesis, DFT, STA, Power, and Verification teams.\nDevelop methodologies and automation scripts to improve PD productivity.\nSupport tapeout activities and signoff closure.\nDebug physical design issues across advanced technology nodes (5nm/3nm/2nm as applicable).\nRequired Qualifications\nEducation\nBachelor's or Master's degree in:\nElectronics Engineering\nElectrical Engineering\nVLSI Design\nComputer Engineering\nTechnical Skills\nPhysical Design Flow\nRTL-to-GDSII implementation\nFloorplanning\nPower Grid Design\nPlacement Optimization\nCTS\nRouting\nECO Implementation\nTiming Closure\nTiming Analysis\nStatic Timing Analysis (STA)\nOCV/AOCV/POCV concepts\nMulti-mode Multi-corner (MMMC) analysis\nTiming Signoff Closure\nPhysical Verification\nDRC/LVS\nAntenna Checks\nDensity Checks\nLEC awareness\nLow Power Design\nUPF/CPF concepts\nPower gating\nMulti-voltage methodologies\nRetention and Isolation strategies\nScripting\nStrong scripting skills in:\nTcl\nPerl\nPython\nShell scripting\nEDA Tools Experience\nExperience with one or more:\nSynopsys\nICC2\nFusion Compiler\nPrimeTime\nStarRC\nIC Validator\nCadence\nInnovus\nTempus\nVoltus\nGenus\nSiemens/Mentor\nCalibre DRC/LVS\nPreferred Qualifications\nExperience with advanced technology nodes (16nm/7nm/5nm/3nm).\nKnowledge of high-performance DDR, CPU, GPU, PCIE, AI/ML, Networking, or Data Center SoCs.\nUnderstanding of package and chiplet integration concepts.\nExperience in hierarchical and full-chip implementation flows.\nStrong debugging and problem-solving skills.\nExcellent communication and collaboration abilities.\n#LI-BM2\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":7166,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:19:33Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":17,"expected_fill_days":81,"reasons":["conf:1","velocity","win:early","comp:brand"],"computed_at":"2026-11-02T06:13:15Z"},"pay":null,"html_url":"https://alion.io/job/amd-pd-engineer","json_url":"https://alion.io/job/amd-pd-engineer.json","meta":{"generated_at":"2026-11-02T14:21:14Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19855,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-03T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-pd-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-pd-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-pd-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-pd-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-pd-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2909975}},{"tool":"search_jobs","arguments":{"company":"amd.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2909975},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}