{"id":3796314,"url":"https://alion.io/job/amd-senior-rtl-design-engineer-fpgaasic-design","title":"Senior RTL Design Engineer – FPGA/ASIC Design","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":97,"open_postings":17,"ghost_share":0,"stale_share":0.118,"repost_share":0,"time_to_fill_p50_days":49,"computed_at":"2026-11-10T06:52:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Bash","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Linux","optional":true},{"name":"MATLAB","optional":true},{"name":"UVM","optional":true},{"name":"Vitis","optional":true},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2026-11-05T07:45:00Z","employer_posted_date":"2026-11-05","last_verified_at":"2026-11-06T09:08:37Z","board_verified":false,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE\nAMD is seeking a highly motivated and technically strong Senior Silicon Design Engineer to join our team working on next-generation adaptive computing and silicon technologies.\nThe successful candidate will contribute to the design, development, integration, and validation of complex FPGA and Adaptive SoC solutions. The role spans RTL/FPGA design, digital signal processing (DSP), and system-level emulation and validation.\nThe candidate will work closely with cross-functional teams to develop high-performance hardware solutions, optimize system performance, and solve challenging engineering problems across hardware and software domains.\nTHE PERSON\nThe ideal candidate is a self-driven engineer with strong digital design fundamentals, excellent analytical and debugging skills, and a passion for developing high-performance silicon solutions.\nThe candidate should demonstrate technical ownership, the ability to independently solve complex engineering challenges, and a collaborative approach to working with multidisciplinary teams.\nWe are looking for someone who is eager to explore new technologies, contribute to technical decisions, and mentor junior engineers.\nKEY RESPONSIBILITIES\nDesign, develop, integrate, and validate complex digital hardware solutions targeting FPGA and Adaptive SoC platforms.\n\nDevelop and optimize RTL designs using VHDL/Verilog/SystemVerilog, with emphasis on functional correctness, performance, and resource utilization.\n\nContribute to FPGA implementation activities, including synthesis, PnR, STA, and timing closure.\n\nDevelop and optimize DSP algorithms and hardware acceleration solutions using programmable logic.\n\nParticipate in hardware-software co-design, embedded system integration, and performance optimization.\n\nDevelop and maintain simulation, co-simulation, emulation, and FPGA-based prototyping environments for design and system validation.\n\nPerform system-level debugging, root-cause analysis, and resolution of complex hardware and software integration issues.\n\nCollaborate with architecture, design, verification, firmware, and software teams to deliver high-quality engineering solutions.\n\nDevelop automation scripts, validation utilities, and regression frameworks to improve engineering efficiency.\n\nParticipate in technical reviews, contribute to architecture and implementation decisions, and identify opportunities for design improvements.\n\nREQUIRED QUALIFICATIONS\nBachelor's or Master's degree in Electrical Engineering, Electronics and Communication Engineering, VLSI, or a related technical discipline with 5- 10 Years.\n\nStrong understanding of digital design fundamentals and FPGA/ASIC design methodologies.\n\nHands-on experience in RTL design and development using VHDL/Verilog/SystemVerilog.\n\nExperience with FPGA design flows, including simulation, synthesis, implementation, and debugging.\n\nGood understanding of static timing analysis, clock domain crossing, and timing closure concepts.\n\nProgramming proficiency in Python & Scripting using Bash/Perl/Tcl.\n\nStrong analytical, debugging, and problem-solving capabilities.\n\nAbility to independently own technical tasks and collaborate effectively across engineering teams.\n\nGood written and verbal communication skills.\n\nPREFERRED QUALIFICATIONS\nExperience in one or more of the following areas would be an advantage:\nAMD/Xilinx Vivado and Vitis development environments.\n\nAMD Versal Adaptive SoC, AI Engine programming, graph development, and performance optimization.\n\nDSP algorithms, MATLAB/Python modeling, and hardware implementation.\n\nFPGA-based emulation, prototyping, and silicon validation.\n\nHardware-software co-design and embedded processor-based systems, including ARM and MicroBlaze.\n\nAXI protocols, memory interfaces, and high-speed data movement architectures.\n\nSystemVerilog/UVM-based verification methodologies.\n\nWireless communication systems, RF signal processing, or high-performance DSP applications.\n\nLinux-based development environments, Tcl/Python scripting, and automated regression frameworks.\n\nExperience with board bring-up, system integration, and hardware debugging.\n\nACADEMIC CREDENTIALS\nB.E./B.Tech or M.E./M.Tech/MS in Electronics, Electrical Engineering, VLSI, or a related field.\n\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE\nAMD is seeking a highly motivated and technically strong Senior Silicon Design Engineer to join our team working on next-generation adaptive computing and silicon technologies.\nThe successful candidate will contribute to the design, development, integration, and validation of complex FPGA and Adaptive SoC solutions. The role spans RTL/FPGA design, digital signal processing (DSP), and system-level emulation and validation.\nThe candidate will work closely with cross-functional teams to develop high-performance hardware solutions, optimize system performance, and solve challenging engineering problems across hardware and software domains.\nTHE PERSON\nThe ideal candidate is a self-driven engineer with strong digital design fundamentals, excellent analytical and debugging skills, and a passion for developing high-performance silicon solutions.\nThe candidate should demonstrate technical ownership, the ability to independently solve complex engineering challenges, and a collaborative approach to working with multidisciplinary teams.\nWe are looking for someone who is eager to explore new technologies, contribute to technical decisions, and mentor junior engineers.\nKEY RESPONSIBILITIES\nDesign, develop, integrate, and validate complex digital hardware solutions targeting FPGA and Adaptive SoC platforms.\n\nDevelop and optimize RTL designs using VHDL/Verilog/SystemVerilog, with emphasis on functional correctness, performance, and resource utilization.\n\nContribute to FPGA implementation activities, including synthesis, PnR, STA, and timing closure.\n\nDevelop and optimize DSP algorithms and hardware acceleration solutions using programmable logic.\n\nParticipate in hardware-software co-design, embedded system integration, and performance optimization.\n\nDevelop and maintain simulation, co-simulation, emulation, and FPGA-based prototyping environments for design and system validation.\n\nPerform system-level debugging, root-cause analysis, and resolution of complex hardware and software integration issues.\n\nCollaborate with architecture, design, verification, firmware, and software teams to deliver high-quality engineering solutions.\n\nDevelop automation scripts, validation utilities, and regression frameworks to improve engineering efficiency.\n\nParticipate in technical reviews, contribute to architecture and implementation decisions, and identify opportunities for design improvements.\n\nREQUIRED QUALIFICATIONS\nBachelor's or Master's degree in Electrical Engineering, Electronics and Communication Engineering, VLSI, or a related technical discipline with 5- 10 Years.\n\nStrong understanding of digital design fundamentals and FPGA/ASIC design methodologies.\n\nHands-on experience in RTL design and development using VHDL/Verilog/SystemVerilog.\n\nExperience with FPGA design flows, including simulation, synthesis, implementation, and debugging.\n\nGood understanding of static timing analysis, clock domain crossing, and timing closure concepts.\n\nProgramming proficiency in Python & Scripting using Bash/Perl/Tcl.\n\nStrong analytical, debugging, and problem-solving capabilities.\n\nAbility to independently own technical tasks and collaborate effectively across engineering teams.\n\nGood written and verbal communication skills.\n\nPREFERRED QUALIFICATIONS\nExperience in one or more of the following areas would be an advantage:\nAMD/Xilinx Vivado and Vitis development environments.\n\nAMD Versal Adaptive SoC, AI Engine programming, graph development, and performance optimization.\n\nDSP algorithms, MATLAB/Python modeling, and hardware implementation.\n\nFPGA-based emulation, prototyping, and silicon validation.\n\nHardware-software co-design and embedded processor-based systems, including ARM and MicroBlaze.\n\nAXI protocols, memory interfaces, and high-speed data movement architectures.\n\nSystemVerilog/UVM-based verification methodologies.\n\nWireless communication systems, RF signal processing, or high-performance DSP applications.\n\nLinux-based development environments, Tcl/Python scripting, and automated regression frameworks.\n\nExperience with board bring-up, system integration, and hardware debugging.\n\nACADEMIC CREDENTIALS\nB.E./B.Tech or M.E./M.Tech/MS in Electronics, Electrical Engineering, VLSI, or a related field.\n\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. 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Docs: https://alion.io/developers"}}