{"id":2911964,"url":"https://alion.io/job/amd-silicon-verification-engineer","title":"Silicon Verification Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":162,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":29,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":42000,"max_usd":86000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":29},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"UVM","optional":false},{"name":"Cadence Xcelium","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys VCS","optional":true},{"name":"SystemVerilog","optional":true}],"status":"live","first_seen_at":"2026-07-28T03:13:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-26T09:13:23Z","board_verified":true,"closed_at":null,"days_open":90,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":90},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.\nAMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.\nTHE ROLE:\nWe are seeking a motivated and detail-oriented Verification Engineer to join our DDR PHY IP development team. As an entry-level engineer, you will play a key role in verifying high-performance DDR PHY intellectual property used in cutting-edge SoCs across data center, mobile, and automotive markets. You’ll work closely with experienced design and architecture teams to develop robust verification environments, ensure design correctness, and contribute to silicon success\nTHE PERSON:\nThe ideal candidate is a passionate and driven engineer with a strong foundation in digital design. You are detail-oriented, eager to learn, and excited by the challenge of working on complex DDR PHY IP used in high-performance systems. You thrive in collaborative environments, take initiative in solving technical problems, and communicate clearly with both design and verification teams. Above all, you are motivated to grow your expertise in memory interface technologies and contribute to delivering reliable, high-quality silicon products.\nKEY RESPONSIBILITIES:\nDevelop and maintain UVM-based verification environments for DDR PHY IP.\nWrite and execute test plans, directed and constrained-random tests, and functional coverage models.\nDebug simulation failures, analyze waveforms, and work with RTL designers to resolve issues.\nCreate and maintain verification collateral, including testbenches, checkers, and scoreboards.\nPerform regression runs, track functional coverage, and ensure full design verification closure.\nContribute to automation scripts for regression, data analysis, and verification efficiency improvements.\nPREFERRED EXPERIENCE:\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.\nStrong understanding of digital design fundamentals (clocking, timing, state machines, analog design basics).\nExperience with SystemVerilog and UVM (academic or internship exposure preferred).\nFamiliarity with simulation tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.\nBasic understanding of DDR memory protocols and PHY architecture is a plus.\nProficiency in scripting languages (Python, Perl, or TCL) for automation.\nExcellent analytical, debugging, and communication skills.\nEnthusiasm for learning and problem-solving in a collaborative, fast-paced environment.\nACADEMIC CREDENTIALS:\nBachelor’s or Master’s degree in related discipline preferred\nLOCATION:\nSingapore\n#LI-D&I\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nWe are seeking a motivated and detail-oriented Verification Engineer to join our DDR PHY IP development team. As an entry-level engineer, you will play a key role in verifying high-performance DDR PHY intellectual property used in cutting-edge SoCs across data center, mobile, and automotive markets. You’ll work closely with experienced design and architecture teams to develop robust verification environments, ensure design correctness, and contribute to silicon success\nTHE PERSON:\nThe ideal candidate is a passionate and driven engineer with a strong foundation in digital design. You are detail-oriented, eager to learn, and excited by the challenge of working on complex DDR PHY IP used in high-performance systems. You thrive in collaborative environments, take initiative in solving technical problems, and communicate clearly with both design and verification teams. Above all, you are motivated to grow your expertise in memory interface technologies and contribute to delivering reliable, high-quality silicon products.\nKEY RESPONSIBILITIES:\nDevelop and maintain UVM-based verification environments for DDR PHY IP.\nWrite and execute test plans, directed and constrained-random tests, and functional coverage models.\nDebug simulation failures, analyze waveforms, and work with RTL designers to resolve issues.\nCreate and maintain verification collateral, including testbenches, checkers, and scoreboards.\nPerform regression runs, track functional coverage, and ensure full design verification closure.\nContribute to automation scripts for regression, data analysis, and verification efficiency improvements.\nPREFERRED EXPERIENCE:\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.\nStrong understanding of digital design fundamentals (clocking, timing, state machines, analog design basics).\nExperience with SystemVerilog and UVM (academic or internship exposure preferred).\nFamiliarity with simulation tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.\nBasic understanding of DDR memory protocols and PHY architecture is a plus.\nProficiency in scripting languages (Python, Perl, or TCL) for automation.\nExcellent analytical, debugging, and communication skills.\nEnthusiasm for learning and problem-solving in a collaborative, fast-paced environment.\nACADEMIC CREDENTIALS:\nBachelor’s or Master’s degree in related discipline preferred\nLOCATION:\nSingapore\n#LI-D&I\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":7508,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Singapore","iso":"SG","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:44:57Z"}],"visa":[],"liveness":{"score":8,"band":"cold","label":"Long shot","p_open":1,"p_active":0.275,"p_room":0.28,"age_days":90,"expected_fill_days":29,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:junior,brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":null,"html_url":"https://alion.io/job/amd-silicon-verification-engineer","json_url":"https://alion.io/job/amd-silicon-verification-engineer.json","meta":{"generated_at":"2026-10-26T12:30:53Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":17190,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-27T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-silicon-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-silicon-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-silicon-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-silicon-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-silicon-verification-engineer"}]}