{"id":2909954,"url":"https://alion.io/job/amd-soc-verification-engineer-soc-ddr-umc","title":"SOC Verification Engineer- SOC DDR, UMC","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":75,"open_postings":163,"ghost_share":0,"stale_share":0.994,"repost_share":0,"time_to_fill_p50_days":28,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":20000,"max_usd":52000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"UVM","optional":false},{"name":"NLP","optional":true},{"name":"Synopsys Verdi","optional":true},{"name":"SystemVerilog","optional":true}],"status":"live","first_seen_at":"2026-10-16T05:07:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-25T01:47:53Z","board_verified":true,"closed_at":null,"days_open":8,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":8},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE (SOC Verification Engineer: SOC DDR, UMC):\nWork on SOC level verification activities, the person will be responsible for bringup verification of LPDDR5, UMC at SOC. Work with testbench team to bringup required infra Structure to bring up testbench and simulation.\nHe will be responsible to coordinate with Design team for RTL delivery, work with design (IP, Subsystem, SOC) for RTL and TB collaterals and resolve issues.\nHe should have good understanding of LPDDR5, UMC.\nHe will be responsible to create TB collaterals for LPDDR5, UMC and phy bringup.\nTHE PERSON:\nEngineer with strong self-driving ability.\nNeed excellent communication skills (both written and oral)\nStrong problem-solving skills, go to person for SOC testbench, DDR verification, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions.\nKEY RESPONSIBILITIES:\nDDR Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team)\nMemory verification is key responsibility.\nWork with Memory architects to resolve issues seen in simulation.\nPREFERRED EXPERIENCE:\nGood understanding of LPDDR*, UMC, Nandflash, Nor Flash etc…\nExpertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation.\nStrong hands-on experience in different SOC Verification activities, DDR Simulation, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc.\nComfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc. \nStrong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence.\nJIRA based project management is a plus. \nACADEMIC CREDENTIALS:\nBE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE\n8-12 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC Verification.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE (SOC Verification Engineer: SOC DDR, UMC):\nWork on SOC level verification activities, the person will be responsible for bringup verification of LPDDR5, UMC at SOC. Work with testbench team to bringup required infra Structure to bring up testbench and simulation.\nHe will be responsible to coordinate with Design team for RTL delivery, work with design (IP, Subsystem, SOC) for RTL and TB collaterals and resolve issues.\nHe should have good understanding of LPDDR5, UMC.\nHe will be responsible to create TB collaterals for LPDDR5, UMC and phy bringup.\nTHE PERSON:\nEngineer with strong self-driving ability.\nNeed excellent communication skills (both written and oral)\nStrong problem-solving skills, go to person for SOC testbench, DDR verification, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions.\nKEY RESPONSIBILITIES:\nDDR Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team)\nMemory verification is key responsibility.\nWork with Memory architects to resolve issues seen in simulation.\nPREFERRED EXPERIENCE:\nGood understanding of LPDDR*, UMC, Nandflash, Nor Flash etc…\nExpertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation.\nStrong hands-on experience in different SOC Verification activities, DDR Simulation, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc.\nComfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc. \nStrong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence.\nJIRA based project management is a plus. \nACADEMIC CREDENTIALS:\nBE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE\n8-12 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC Verification.\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":6628,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:19:33Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":8,"expected_fill_days":28,"reasons":["conf:3","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/amd-soc-verification-engineer-soc-ddr-umc","json_url":"https://alion.io/job/amd-soc-verification-engineer-soc-ddr-umc.json","meta":{"generated_at":"2026-10-25T05:05:27Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":6906,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-soc-verification-engineer-soc-ddr-umc"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-soc-verification-engineer-soc-ddr-umc"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-soc-verification-engineer-soc-ddr-umc"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-soc-verification-engineer-soc-ddr-umc\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-soc-verification-engineer-soc-ddr-umc"}]}