{"id":2910118,"url":"https://alion.io/job/amd-sr-silicon-design-verification-engineer","title":"Sr. Silicon Design Verification Engineer","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":80,"open_postings":157,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":15,"computed_at":"2026-10-22T06:10:10Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Penicuik, United Kingdom"],"countries":["GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":71000,"max_usd":125000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":37},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"SystemC","optional":true},{"name":"SystemVerilog","optional":true},{"name":"UVM","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-10-09T15:05:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-22T15:30:46Z","board_verified":true,"closed_at":null,"days_open":13,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":13},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE:\nAs part of AMD's networking silicon team, you will work on next-generation network processors and SmartNIC technologies, driving verification of complex packet-processing, control-plane, and system-level features. You will leverage automation, data-driven methodologies, and AI-assisted engineering tools to improve verification productivity, accelerate debug, enhance coverage analysis, and help deliver high-quality silicon.\nThis role provides the opportunity to work at the intersection of networking silicon, advanced verification methodologies, and AI-driven engineering productivity. You will help shape how modern verification teams leverage automation and intelligent workflows to improve quality, scalability, and time-to-market.\nTHE PERSON:\nYou have a passion for modern, complex processor architectures, digital design, and verification. You are a collaborative team player with excellent communication skills and experience working with engineers across multiple sites and time zones. You possess strong analytical and problem-solving skills, are eager to learn, and are motivated to tackle challenging technical problems.\nKEY RESPONSIBILITIES:\nCollaborate with architects, hardware engineers, and firmware engineers to understand new features and define verification requirements.\nBuild comprehensive verification plans that account for interactions across hardware, firmware, software, and system-level use cases.\nDevelop directed and constrained-random tests, verification environments, and automation infrastructure.\nEstimate verification effort and identify required enhancements to verification environments and methodologies.\nDebug test failures to determine root cause and work with RTL and firmware engineers to resolve design defects.\nReview and drive functional and code coverage closure through targeted test development and analysis.\nContribute to advanced verification methodologies spanning simulation, emulation, and data-driven analytics to accelerate silicon quality and release readiness.\nDevelop automation solutions and leverage AI-assisted workflows to improve verification efficiency, debug productivity, coverage analysis, and test development.\nDrive continuous improvement of verification processes through scripting, automation, and emerging AI technologies.\nPREFERRED EXPERIENCE:\nProficient in IP-level ASIC verification.\nStrong experience with UVM testbenches and SystemVerilog.\nProficient in debugging RTL and firmware using industry-standard simulation tools.\nExperience with Verilog, SystemVerilog, C, and C++.\nExperience developing UVM-based verification frameworks, reusable components, and verification methodologies.\nExperience with Python, Perl, Shell, Makefiles, or similar scripting languages.\nFamiliarity with data analytics, workflow automation, and AI-enabled engineering practices.\nExperience applying AI/ML-assisted tools to verification, debug, coverage closure, or engineering productivity workflows.\nExperience using Python-based frameworks and AI-assisted development tools to improve engineering efficiency.\nGood understanding of SystemC and TLM; related experience is a plus.\nExposure to networking, packet processing, Ethernet, SmartNIC, or networking processor architectures is highly desirable.\nExposure to leadership and mentorship is an asset.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field.\n#LI-CY1\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nAs part of AMD's networking silicon team, you will work on next-generation network processors and SmartNIC technologies, driving verification of complex packet-processing, control-plane, and system-level features. You will leverage automation, data-driven methodologies, and AI-assisted engineering tools to improve verification productivity, accelerate debug, enhance coverage analysis, and help deliver high-quality silicon.\nThis role provides the opportunity to work at the intersection of networking silicon, advanced verification methodologies, and AI-driven engineering productivity. You will help shape how modern verification teams leverage automation and intelligent workflows to improve quality, scalability, and time-to-market.\nTHE PERSON:\nYou have a passion for modern, complex processor architectures, digital design, and verification. You are a collaborative team player with excellent communication skills and experience working with engineers across multiple sites and time zones. You possess strong analytical and problem-solving skills, are eager to learn, and are motivated to tackle challenging technical problems.\nKEY RESPONSIBILITIES:\nCollaborate with architects, hardware engineers, and firmware engineers to understand new features and define verification requirements.\nBuild comprehensive verification plans that account for interactions across hardware, firmware, software, and system-level use cases.\nDevelop directed and constrained-random tests, verification environments, and automation infrastructure.\nEstimate verification effort and identify required enhancements to verification environments and methodologies.\nDebug test failures to determine root cause and work with RTL and firmware engineers to resolve design defects.\nReview and drive functional and code coverage closure through targeted test development and analysis.\nContribute to advanced verification methodologies spanning simulation, emulation, and data-driven analytics to accelerate silicon quality and release readiness.\nDevelop automation solutions and leverage AI-assisted workflows to improve verification efficiency, debug productivity, coverage analysis, and test development.\nDrive continuous improvement of verification processes through scripting, automation, and emerging AI technologies.\nPREFERRED EXPERIENCE:\nProficient in IP-level ASIC verification.\nStrong experience with UVM testbenches and SystemVerilog.\nProficient in debugging RTL and firmware using industry-standard simulation tools.\nExperience with Verilog, SystemVerilog, C, and C++.\nExperience developing UVM-based verification frameworks, reusable components, and verification methodologies.\nExperience with Python, Perl, Shell, Makefiles, or similar scripting languages.\nFamiliarity with data analytics, workflow automation, and AI-enabled engineering practices.\nExperience applying AI/ML-assisted tools to verification, debug, coverage closure, or engineering productivity workflows.\nExperience using Python-based frameworks and AI-assisted development tools to improve engineering efficiency.\nGood understanding of SystemC and TLM; related experience is a plus.\nExposure to networking, packet processing, Ethernet, SmartNIC, or networking processor architectures is highly desirable.\nExposure to leadership and mentorship is an asset.\nACADEMIC CREDENTIALS:\nBachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field.\n#LI-CY1\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":9358,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:19:33Z"}],"visa":[],"liveness":{"score":44,"band":"fade","label":"Fading","p_open":1,"p_active":0.581,"p_room":0.75,"age_days":12,"expected_fill_days":15,"reasons":["conf:1","stale_co","velocity","win:late","comp:brand"],"computed_at":"2026-10-22T06:10:10Z"},"pay":null,"html_url":"https://alion.io/job/amd-sr-silicon-design-verification-engineer","json_url":"https://alion.io/job/amd-sr-silicon-design-verification-engineer.json","meta":{"generated_at":"2026-10-22T19:05:40Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2239,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-23T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-sr-silicon-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-sr-silicon-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-sr-silicon-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-sr-silicon-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-sr-silicon-design-verification-engineer"}]}