{"id":2910560,"url":"https://alion.io/job/amd-standard-cell-design-enablement-lead","title":"Standard Cell Design Enablement Lead","company":{"id":93,"name":"AMD","domain":"amd.com","url":"https://alion.io/company/amd","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":80,"open_postings":160,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":20,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Sales","role_family":"Sales","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Markham, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":54000,"max_usd":133000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":49},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Unix","optional":true}],"status":"live","first_seen_at":"2026-10-05T16:48:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-23T08:30:41Z","board_verified":true,"closed_at":null,"days_open":17,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":17},"description":"ADVANCE YOUR CAREER. ADVANCE THE WORLD.\nAt AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.\nWhether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.\nTHE ROLE:\nThis role is part of a team that is responsible for developing Standard Cell Libraries, supporting 3RD party Standard Cell Libraries for all AMD products, and in-house Process Characterization structures. These IPs must meet AMD’s performance, power, area, and cost requirements in state-of-the-art CMOS technologies. We are exposed to bleeding-edge technologies that few other companies will ever hear of. We play a major role in shaping AMD’s roadmap and future products.\nThis team is essential to the success of AMD as a growing company. It is a very exciting environment, and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer.\nTHE PERSON:\nIn-depth knowledge of semiconductor device physics and fabrication processes, strong analytical and problem-solving skills related to semiconductor device performance, ability to collaborate effectively with design, layout, and verification teams, exceptional written and oral communication skills in English.\nRESPONSIBILITIES:\nCommunication with external standard cell library vendor regarding schedules, requirements, SOW (statement of work)\nDriving communication with our external standard cell library vendors and internal customers related to library release schedules and contents, questions and issues. \nOversight of download, build, release, QA of libraries.\nCoordinate the effort to download, build, release and QA vendor standard cell libraries, as well as driving discussion for internally developed cells from our customers.\nAddressing requests and issues for standard cells.\nPREFERRED EXPERIENCE:\nStandard cell design and layout analysis.\nProficiency in industry-standard EDA (SNPS/CDNS/Siemens) tools for PDK (product development kit), DRC (design rule check) , LVS (layout vs schematic), Virtuoso, PEX, capacitance modeling, and EMIR and reliability analysis.\nExperience with IR Drop analysis techniques and tools.\nSchematic and layout entry, physical and logical verification, extraction, timing characterization using industry standard EDA tools in advanced semiconductor processes, coupled with the ability to leverage Unix shell environments and scripting languages such as Perl and Python.\nExperience with SPICE simulation and familiarity with industry-standard modeling techniques.\nProficiency in Unix shell environments, Perl, and Python scripting.\nACADEMIC CREDENTIALS:\nMSEE/MSCS in related field\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.\nTHE ROLE:\nThis role is part of a team that is responsible for developing Standard Cell Libraries, supporting 3RD party Standard Cell Libraries for all AMD products, and in-house Process Characterization structures. These IPs must meet AMD’s performance, power, area, and cost requirements in state-of-the-art CMOS technologies. We are exposed to bleeding-edge technologies that few other companies will ever hear of. We play a major role in shaping AMD’s roadmap and future products.\nThis team is essential to the success of AMD as a growing company. It is a very exciting environment, and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer.\nTHE PERSON:\nIn-depth knowledge of semiconductor device physics and fabrication processes, strong analytical and problem-solving skills related to semiconductor device performance, ability to collaborate effectively with design, layout, and verification teams, exceptional written and oral communication skills in English.\nRESPONSIBILITIES:\nCommunication with external standard cell library vendor regarding schedules, requirements, SOW (statement of work)\nDriving communication with our external standard cell library vendors and internal customers related to library release schedules and contents, questions and issues. \nOversight of download, build, release, QA of libraries.\nCoordinate the effort to download, build, release and QA vendor standard cell libraries, as well as driving discussion for internally developed cells from our customers.\nAddressing requests and issues for standard cells.\nPREFERRED EXPERIENCE:\nStandard cell design and layout analysis.\nProficiency in industry-standard EDA (SNPS/CDNS/Siemens) tools for PDK (product development kit), DRC (design rule check) , LVS (layout vs schematic), Virtuoso, PEX, capacitance modeling, and EMIR and reliability analysis.\nExperience with IR Drop analysis techniques and tools.\nSchematic and layout entry, physical and logical verification, extraction, timing characterization using industry standard EDA tools in advanced semiconductor processes, coupled with the ability to leverage Unix shell environments and scripting languages such as Perl and Python.\nExperience with SPICE simulation and familiarity with industry-standard modeling techniques.\nProficiency in Unix shell environments, Perl, and Python scripting.\nACADEMIC CREDENTIALS:\nMSEE/MSCS in related field\nBenefits offered are described: AMD benefits at a glance.\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","description_format":"text","description_chars":7390,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-20T09:28:01Z"}],"visa":[],"liveness":{"score":42,"band":"fade","label":"Fading","p_open":1,"p_active":0.558,"p_room":0.75,"age_days":17,"expected_fill_days":20,"reasons":["conf:1","stale_co","velocity","win:late","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/amd-standard-cell-design-enablement-lead","json_url":"https://alion.io/job/amd-standard-cell-design-enablement-lead.json","meta":{"generated_at":"2026-10-23T09:15:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":14798,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":93},"rest":"https://alion.io/mcp/rest/get_company?id=93"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Famd-standard-cell-design-enablement-lead"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Famd-standard-cell-design-enablement-lead"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Famd-standard-cell-design-enablement-lead"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/amd-standard-cell-design-enablement-lead\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Famd-standard-cell-design-enablement-lead"}]}