{"id":959662,"url":"https://alion.io/job/analog-devices-senior-system-software-engineer-hwsw-co-design","title":"Senior System Software Engineer - HW/SW Co-Design","company":{"id":58431,"name":"Analog Devices","domain":"analog.com","url":"https://alion.io/company/analog-devices","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":61,"ghost_share":0,"stale_share":0.689,"repost_share":0,"time_to_fill_p50_days":49,"computed_at":"2026-10-20T05:45:00Z"}},"role":"DevOps","role_family":"DevOps","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":21000,"max_usd":43000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":49},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"SystemC","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Cadence Palladium","optional":true},{"name":"Linux","optional":true},{"name":"QEMU","optional":true},{"name":"RTOS","optional":true},{"name":"Siemens Veloce","optional":true}],"status":"live","first_seen_at":"2026-05-21T00:00:00Z","employer_posted_date":"2026-05-21","last_verified_at":"2026-10-20T13:59:29Z","board_verified":true,"closed_at":null,"days_open":152,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":152},"description":"About Analog Devices\nAnalog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more atwww.analog.comand onLinkedInand Twitter (X).\nSenior System Software Engineer\nWe are looking for a Senior System Software Engineer to join our HW/SW Co-Design team. In this role, you will take ownership of individual IP blocks from a software perspective -- defining, reviewing, and implementing the functionality and the hardware/software interfaces of those blocks in close collaboration with the HW engineer writing the RTL.\nYou will work alongside a Principal System Software Architect who sets the broader system-level direction, while you dive deep into the details of specific IP blocks. Your focus is narrower but no less critical: ensuring that each block is well-designed for software consumption, efficiently programmable, debuggable, and consistent with the overall system architecture.\nThis is applied engineering, not abstract design work. You will spend 4-6 weeks at a time embedded with a hardware engineer counterpart, iterating together on register maps, data flow, interrupt behavior, configuration schemes, and DMA interfaces -- writing real code against virtual platform models to validate decisions before silicon exists.\nKey Responsibilities\nIP Block Software Ownership: Own the software perspective for assigned IP blocks end-to-end -- from initial definition through implementation review and pre-silicon validation.\nHW/SW Interface Definition: Work directly with HW engineers to co-define register maps, control/status interfaces, interrupt schemes, and data path configurations that are efficient and straightforward to program.\nVirtual Platform Implementation: Work with the SystemC modeling team to deliver firmware or driver prototypes against virtual platforms to validate IP block designs and catch usability or performance issues early.\nDesign Review Participation: Review RTL specifications and micro-architecture documents, providing actionable feedback from a software integration perspective before RTL is committed.\nDriver & Firmware Prototyping: Develop early driver code and firmware prototypes that exercise IP block functionality, proving out programming models and identifying gaps.\nDebuggability Assessment: Evaluate and influence the debug and observability features of each IP block, ensuring software has adequate visibility during bringup and in the field.\nDocumentation & Handoff: Produce clear programming guides, register descriptions, and usage examples that downstream software teams can use to build production drivers and SDKs.\nCross-Block Integration: Collaborate with peers owning adjacent IP blocks to ensure consistent interfaces, shared conventions, and smooth data flow between blocks.\nRequired Qualifications\n5+ years of experience in embedded software, firmware development, or SoC platform software\nProficiency in C/C++ with hands-on experience writing device drivers, HALs, or register-level firmware\nStrong understanding of hardware/software interfaces: register maps, memory-mapped I/O, interrupt handling, DMA, and bus protocols (AXI/AHB/APB)\nAbility to read and interpret RTL (Verilog/SystemVerilog) or hardware specification documents\nExperience collaborating directly with hardware design engineers during IP or SoC development\nFamiliarity with SystemC (TLM 2.0) or willingness to develop proficiency quickly for virtual platform work\nAttention to detail -- able to identify subtle interface issues, race conditions, or ambiguities in hardware specifications\nStrong interpersonal skills -- able to work side-by-side with HW engineers for extended periods, negotiate trade-offs constructively, and build trust\nPreferred Qualifications\nFamiliarity with AMBA protocols\nExperience with SystemC modeling or virtual platform development (e.g., Synopsys Virtualizer, QEMU, or custom TLM platforms)\nFamiliarity with FPGA prototyping or pre-silicon software bring-up workflows\nExperience with Zephyr RTOS and/or Embedded Linux kernel driver development\nKnowledge of RISC-V or Arm architecture, including interrupt controllers, memory protection, and debug infrastructure\nExperience with signal processing, data converter, or mixed-signal IP blocks\nFamiliarity with hardware emulation environments (Palladium, Veloce, etc.)\nBackground in design verification or functional coverage from a software stimulus perspective\nExperience with Verilog/SystemVerilog for co-simulation or design comprehension\nWhat Sets This Role Apart\nThis is not a downstream software role where you receive a finished data sheet and write a driver. You are part of the design process from the start -- shaping the hardware you will eventually program. When the register map doesn't make sense for software, you have the authority and responsibility to push back and propose alternatives.\nExpect to spend weeks at a time working intensively with a single HW engineer on a specific IP block -- whiteboarding interfaces, debating trade-offs, writing prototype code, and iterating until the design is right. This requires patience, attention to detail, and the ability to compromise effectively when hardware constraints conflict with software ideals.\nYou will stay with your IP blocks through the full lifecycle: initial concept, specification review, virtual platform validation, silicon bringup, and production driver handoff. If you want deep ownership of the hardware/software boundary at the block level and enjoy the craftsmanship of getting interfaces right, this role is for you.\nEducation\nBS/MS in Computer Engineering, Electrical Engineering, Computer Science, or a related field\nFor positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.\nAnalog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.\nJob Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days","description_format":"text","description_chars":7138,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Sensors & Transducers","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-09-16T08:31:40Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.384,"p_room":0.28,"age_days":152,"expected_fill_days":49,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-20T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/analog-devices-senior-system-software-engineer-hwsw-co-design","json_url":"https://alion.io/job/analog-devices-senior-system-software-engineer-hwsw-co-design.json","meta":{"generated_at":"2026-10-20T17:03:11Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19426,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-21T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58431},"rest":"https://alion.io/mcp/rest/get_company?id=58431"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fanalog-devices-senior-system-software-engineer-hwsw-co-design"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fanalog-devices-senior-system-software-engineer-hwsw-co-design"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fanalog-devices-senior-system-software-engineer-hwsw-co-design"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/analog-devices-senior-system-software-engineer-hwsw-co-design\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fanalog-devices-senior-system-software-engineer-hwsw-co-design"}]}