{"id":2339649,"url":"https://alion.io/job/apple-analog-ic-product-engineer-mfd","title":"Analog IC Product Engineer (m/f/d)","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"B","score":76,"open_postings":1017,"ghost_share":0,"stale_share":0.97,"repost_share":0,"time_to_fill_p50_days":36,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Munich, Germany"],"countries":["DE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":108000,"max_usd":218000,"period":"year","method":"role_country_seniority_unknown","sample_n":34},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Machine Learning","optional":false}],"status":"live","first_seen_at":"2026-10-12T07:04:20Z","employer_posted_date":"2026-10-12","last_verified_at":"2026-10-13T11:27:37Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"At Apple, we work every single day to create products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our Productization team in Munich, you will help shape upcoming products that will delight and inspire millions of Apple customers every day!\nWe are looking for an Analog IC Product Engineer to own and drive New Product Introduction (NPI) activities for analog IC devices - from first silicon through high-volume production ramp. You will partner with Design, DFT, Test, and Quality teams to characterize devices, debug complex failure mechanisms, and apply modern data analytics and AI techniques to drive yield and quality improvements.\nDescription\n- Coordinate New Product Introduction activities for analog IC devices.\n- Define milestones, communicate the product development schedule, and drive execution on a regular cadence.\n- Partner with Design, DFT, and Test Engineers to debug, root cause, and implement corrective actions for fault isolation.\n- Perform statistical analysis on large production datasets to identify and drive yield improvements.\n- Apply the latest AI and machine learning technologies for deep-dive analysis, accelerating root cause identification and quality and yield optimization.\n- Work with Test Engineering on test program releases through correlation analysis.\n- Define ATE characterization test plans and generate characterization reports.\n- Drive GRR data collection and analysis, and work with Test Engineers to improve test program stability considering test time reduction trade-offs.\n- Support QA and Reliability teams across a range of product qualification requirements.\n- Finalize test limits for mass production and define appropriate guard bands based on ATE-to-bench correlation, GRR, HTOL, and PVT characterization results.\n- Work with internal teams to support mass production ramp.\nMinimum Qualifications\nIn-depth knowledge of semiconductor manufacturing processes.\nSolid understanding of Analog, DC, and power fundamentals.\nStrong foundation in statistical data analysis.\nExcellent written and verbal communication skills, with the ability to drive alignment across cross-functional teams.\nFluency in English is required.\nBS/MS in Electrical Engineering, Computer Engineering, or equivalent is required.\nPreferred Qualifications\nIdeally several years of experience in semiconductor product engineering.\nExperience working with cross-functional teams to define ATE characterization test plans, coordinate data collection, and perform analysis across PVT.\nDirect experience with yield management in high-volume manufacturing.\nGood understanding of GRR analysis, ATE-to-bench correlation, guard-banding methodologies, and the statistics behind test limit definition.\nFamiliarity with product and package qualification requirements (HTOL, ESD, latch-up, etc.).\nExperience with AI/ML tools and frameworks is a plus.\nAbility to set up DOEs to drive root cause of diverse failure mechanisms.\nExposure to analog package technologies is considered a plus.\nExposure to analog test methodologies is a plus.\nThis role requires occasional international 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