ASIC Design Engineering Lead - SoC IP DMA
Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Oct 5, 2026. Apple scores B on the Alion truth index.
In this highly visible, hands-on role, you will lead a team of engineers at the center of Apple's SOC IP DMA design effort. Balancing equal parts people management and technical leadership, you will guide your team through the full front-end design cycle, including microarchitecture, RTL delivery, and debug. Your leadership will ensure silicon-ready quality while fostering a culture of teamwork and collaboration, continuous learning, and engineering excellence. Your work will have direct impact on products used by millions of people worldwide.
Description
As a hands-on ASIC Design Engineering Lead, you will split your time equally between leading your team and contributing directly as a technical contributor. You will:
- Work closely with the platform architecture team to understand and refine architectural requirements
Lead your team to define and document the micro-architecture
- Provide high-level technical guidance, drive micro-architectural decisions, review team members’ work and provide feedback, and ensure quality and across the team's design work
- Actively drive the development of design infrastructure, automation, and strategic use of AI and other emerging tools
- Be hands-on with the all activities of the team, e.g. micro-architecture, RTL design, verification strategy, debug, and infrastructure development
- Scope features, generate effort, area, and power estimates, and create bottoms-up project schedules and resourcing plans.
- Partner with architecture, IP integration, chip integration, design verification, and formal verification teams to align on plans, milestones, and deliverables
- Track execution, surface and resolve risks early, and communicate clearly to management and stakeholders
- Lead, mentor, and grow a team of engineers; actively invest in each person's technical and professional development
- Build a team culture grounded in teamwork and collaboration, intellectual honesty, design/idea sharing, and a genuine growth mindset
- Manage interpersonal dynamics thoughtfully and cultivate strong relationships within the team and with cross-functional teams
Minimum Qualifications
BS and a minimum of 20 years relevant industry experience
Preferred Qualifications
10+ years of hands-on experience in front-end ASIC design
Experience in technical leadership: accountable for multi-person deliverables, setting technical direction, and interfacing effectively with management and cross-functional partners.
Experience managing people on a team strongly desired
Outstanding written and verbal communication skills and cross-functional collaboration instincts
Excellent project planning and execution skills: bottom-up scheduling, effort, area, and power estimation, milestone planning and execution, and resource management
Solid understanding of SoC architecture and high performance designs particularly for high speed networking, AI/ML compute, image and video processing, and/or memory subsystems
Understanding of design concepts including arbitration, flow control, address translation, caching, bandwidth, pipelining, real time quality-of-service, and AMBA protocols, (AXI, APB, etc.).
Understanding of low-power design techniques including clock gating, power gating, and logic depth; Understanding of timing optimization and high-frequency design
Track record of driving innovation through building tools, infrastructure, and automation, and strategic use of emerging technologies including AI.
Formal verification experience a plus