{"id":2993490,"url":"https://alion.io/job/apple-cad-engineer-design-verification-methodology-4","title":"CAD Engineer – Design Verification Methodology","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":90,"open_postings":824,"ghost_share":0,"stale_share":0.214,"repost_share":0.006,"time_to_fill_p50_days":122,"computed_at":"2026-11-11T05:49:22Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Francisco, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":250000,"max_usd":456000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":527},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"C++","optional":true},{"name":"Cadence Xcelium","optional":true},{"name":"Machine Learning","optional":true},{"name":"Perl","optional":true},{"name":"Siemens ModelSim","optional":true},{"name":"Synopsys Verdi","optional":true},{"name":"SystemVerilog","optional":true},{"name":"Verilog","optional":true},{"name":"VHDL","optional":true}],"status":"live","first_seen_at":"2026-04-15T15:45:29Z","employer_posted_date":"2026-11-11","last_verified_at":"2026-11-11T16:28:00Z","board_verified":true,"closed_at":null,"days_open":210,"trust":{"level":"ok","repost_count":1,"flags":[],"days_open":210},"description":"Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices!\nDescription\nAs a member of our CAD team, you will develop, maintain, and enhance existing sophisticated software systems for regression-testing Apple’s silicon designs in software simulation, to find and report defects in our chip designs, and thus ensure that Apple tapes-out world-class silicon. Your experience and innovative ideas will inform the design of the next generation of these regression systems. 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You will work closely with EDA vendors to incorporate new capabilities of their commercial tools, and to resolve problems.\nMinimum Qualifications\nMinimum of BS degree + 10 years of relevant experience\nExperience developing, maintaining, and enhancing an existing system for regressing RTL\nExperience debugging vendor tool problems\nPython programming background is required\nPreferred Qualifications\nExperience with TCL or Perl is a plus\nExperience with artificial intelligence and machine learning\nExperience with interacting with DV team(s) to help solve their problems.\nExperience in implementing new functionality to solve emerging problems or to optimize already existing methods.\nMSEE/CE/CS preferred.\nKnowledge in Verilog and SystemVerilog; familiarity with VHDL a plus.\nExperience with VCS, XCelium, or Modelsim simulation tools.\nExperience with Cadence or Synopsys Emulation tools.\nGood communications skills are required and prior customer support experience is a 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