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Salary
≈ $125k – $288k per year (Estimated)
Location
In office (Haifa)
Seniority
Middle · 3+ years exp

Confirmed on the employer's own hiring board on Oct 20, 2026. First seen by Alion on Oct 20, 2026. Apple scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Apple is an American multinational technology company founded in 1976 by Steve Jobs, Steve Wozniak and Ronald Wayne, and headquartered in Cupertino, California. It designs and sells consumer hardware including the iPhone, Mac, iPad, Apple Watch, AirPods and Vision Pro, together with the operating systems and silicon that run them. A growing services division built around the App Store, iCloud, Apple Music, Apple TV+ and Apple Pay now contributes a large share of profit, making Apple one of the most valuable companies in the world.

In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process.

Description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products very quickly.

Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple.Do you want to join us to help deliver the next groundbreaking Apple products?

The Apple SoC design team is looking for an experienced engineer to develop Apple's compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system.

Minimum Qualifications

3+ years of experience in digital design (preferably in SoC)

Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT) - Advantage

Familiar with various chip development tools (e.g. lint, synthesis, STA)

Familiar with verification methodologies

Strong Verilog/System Verilog skills

Experienced with scripting using common languages (e.g. Python, Perl, TCL)

Preferred Qualifications

BS.c/ MS.c in EE/ CE

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