Digital ASIC Architect
Confirmed on the employer's own hiring board on Oct 11, 2026. First seen by Alion on Oct 8, 2026. Apple scores B on the Alion truth index.
Define the digital architecture behind Apple's next generation of motion-aware experiences. The Motion Sensing Hardware organization designs the IMUs, magnetometers, pressure sensors, and other sensing ASICs that enable spatial computing, gesture input, head-tracked audio, and crash and fall detection across iPhone, iPad, Apple Watch, AirPods, and Vision Pro. The architectures and hardware our team invents are what become the features customers feel first. If you want to set the direction for what motion sensing on Apple products can do, this is your team.
Description
As a Digital ASIC Architect on the Motion Sensing Hardware team, you will own the digital architecture of motion sensing ASICs from concept through silicon, with the goal of delivering best-in-class sensing experiences across Apple's product line. You will analyze the application, then define cost and power optimized digital systems built around one or more processors, DSP cores, and custom control engines. You will translate high-level user and product requirements into a realizable system, build the high-level models that prove out the architecture, and author the detailed specifications that drive the rest of the IC development. This is a highly cross-functional role. You will work with circuit design, firmware, algorithms, software, and product teams to identify the critical interactions between the ASIC and the broader product, and you will produce the architectures and specifications that become the silicon Apple ships and the features customers feel.
Minimum Qualifications
BS in Electrical Engineering or related field with a minimum of 10 years of relevant industry experience
Excellent written and verbal communication skills
Preferred Qualifications
Deep expertise in digital ASIC architecture for sensor or mixed-signal systems, including processor and DSP sub-system definition, memory and bus architecture, and custom control engine micro-architecture
Proven track record of defining and taping out high-volume, complex digital and mixed-signal ICs from architecture through production
Strong foundation in system-level design, requirements development, and hardware/firmware partitioning for sensing or low-power embedded applications
Experience developing sensing algorithms and signal processing pipelines, with the modeling skills to evaluate them before silicon
Experience with IC bring-up, silicon characterization, and system-level debug
Proficiency in MATLAB, Python, C/C++, or SystemC for high-level modeling and simulation