{"id":2641652,"url":"https://alion.io/job/apple-gate-level-sigemsebfit-cad-engineer-3","title":"Gate-level SigEM/SEB/FIT CAD Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":91,"open_postings":931,"ghost_share":0,"stale_share":0.15,"repost_share":0.002,"time_to_fill_p50_days":102,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":116000,"max_usd":273000,"period":"year","method":"role_country_seniority_unknown","sample_n":14270},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys RedHawk","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys PrimeTime","optional":true}],"status":"live","first_seen_at":"2026-10-15T16:07:23Z","employer_posted_date":"2026-10-15","last_verified_at":"2026-10-24T03:38:12Z","board_verified":true,"closed_at":null,"days_open":8,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":8},"description":"Imagine what you could do here! At Apple, new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - we continue to strengthen our commitment to leave the world better than we found it!\nAs an emerging member of our best-in-class CAD Group, you will be part of building innovative designs. You will leverage your strong engineering fundamentals in electrical engineering and computer science-paired with an eagerness to learn electromigration (EM), Statistical Electromigration Budgeting (SEB), Failure In Time (FIT), Self-Heating Effect (SHE), and thermal analysis-to assist in developing, maintaining, and refining methodologies and flows for gate-level as well as transistor-level designs. You will support tasks spanning IP / SOC signal EM analysis for clock and data nets, SOC FIT budget verification, power-grid EM checks, and flow automation. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?\nDescription\nIn this visible role, your primary responsibilities will include:\nAssist senior engineers in the development, testing, and deployment of EM/SEB/thermal analysis methodologies and flows\nSupport the automation, maintenance, and regression testing of CAD flows from setup through sign-off\nHelp run, validate, and debug simulation and verification runs on benchmark and production designs\nAssist in developing and maintaining verification scripts and rule checks for clock trees, high-speed data paths, and critical signal nets\nPartner with senior team members to support cross-functional teams (Physical Design, Timing, Circuit Design, Power) by triaging flow execution issues and gathering data\nMinimum Qualifications\nBS or MS degree in Electrical Engineering or a related field\nPreferred Qualifications\nStrong academic foundation in VLSI design, semiconductor physics, circuit theory, or computer engineering\nBasic understanding of electromigration (EM) mechanisms, heating effects, current density, or chip reliability concepts\nExposure to fundamental concepts in static timing analysis (STA), circuit simulation (SPICE), parasitic extraction, or physical design principles\nProficiency in at least one of Tcl, Python, or Perl scripting languages\nHigh motivation, strong problem-solving abilities, and eagerness to learn complex CAD methodologies\nPrior internship, co-op, or academic research experience in VLSI design, CAD/EDA flow development, or chip reliability\nFamiliarity or hands-on exposure to commercial EDA tools (e.g., Voltus, RedHawk, Primetime, ICC2, Innovus, or SPICE simulators) through coursework or projects is a plus\nCuriosity about or coursework in AI/ML applications in CAD/EDA workflows\nProactive attitude with a demonstrated ability to learn quickly under mentorship and guidance\nStrong collaboration and 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