{"id":3821583,"url":"https://alion.io/job/apple-physical-design-engineer-15","title":"Physical Design Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":89,"open_postings":812,"ghost_share":0,"stale_share":0.222,"repost_share":0.004,"time_to_fill_p50_days":90,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Beaverton, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys RedHawk","optional":false},{"name":"Cadence Conformal","optional":false},{"name":"Cadence Innovus","optional":false},{"name":"Python","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-11-05T13:31:33Z","employer_posted_date":"2026-11-05","last_verified_at":"2026-11-07T16:43:49Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.\nDescription\nAPPLE INC has the following available in Beaverton, Oregon. Physical Design implementation of partitions and develop/test place and route flows. Implement physical design of partitions and top level. Develop and test place and route flows. Conduct floor planning, pin assignments, macro placement and evaluation of logic. Iterate over placement to get the optimized placement and timing. Clock tree synthesis, optimization, routing and post-route optimization. Conduct setup, hold, transition and other static timing checks and closure. Run Static Voltage Droop and dynamic Voltage Droop and other power related optimization and signoff. Conduct formal checking and signoff, full chip timing closure, physical verification and closure, and signoff checklist closure. 40 hours/week.\nMinimum Qualifications\nBachelors degree or foreign equivalent in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field.\nExperience and/or education must include:\nUsing Cadence Innovus, Synopsys ICC-2 to work on Place and Route of complex digital logic blocks.\nUsing Primetime-SI to analyze timing results and generate fixes needed.\nUsing Calibre to understand and debug physical verification results including LVS, DRC and antenna checks.\nUtilizing UPF and knowledge of Conformal-LP to verify low power intent.\nUsing Voltus, Redhawk to generate EM and IR results to analyze the power-grid integrity. Ability to generate fixes based on violations reported.\nUtilizing TCL, Python, TCSH to develop automation scripts that improve efficiency.\nUsing Innovus CCOPT to analyze and optimize clock-tree to minimize power, improve latency and skew.\nLeveraging semiconductor device physics to make informed power, performance, and area (PPA) trade-offs in PnR implementations.\nUsing Verilog for design and verification, and ability to write Verilog modules.\nLeveraging microprocessor system design, including architecture, datapath, control logic, and memory hierarchy.\nPreferred Qualifications\nN/A","description_format":"text","description_chars":2360,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Operating Systems","Laptops","Smartwatches & Fitness Trackers","Tablets"],"lifecycle":[{"event":"open","at":"2026-11-05T17:23:45Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 6,350 · green card filings: 39","filings_12m":6350,"filings_prev_12m":6528,"green_card_filings_12m":39,"median_offered_wage_usd":177313,"route":null,"cap_exempt":false,"checked_at":"2026-11-07T07:57:00+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":1366}],"liveness":{"score":100,"band":"hot","label":"Hiring now","p_open":1,"p_active":1,"p_room":1,"age_days":1,"expected_fill_days":90,"reasons":["conf:1","wave","urgency","velocity","win:early","comp:brand"],"computed_at":"2026-11-07T05:47:08Z"},"pay":null,"html_url":"https://alion.io/job/apple-physical-design-engineer-15","json_url":"https://alion.io/job/apple-physical-design-engineer-15.json","meta":{"generated_at":"2026-11-07T20:35:42Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":32794,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-08T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":12},"rest":"https://alion.io/mcp/rest/get_company?id=12"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fapple-physical-design-engineer-15"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fapple-physical-design-engineer-15"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fapple-physical-design-engineer-15"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/apple-physical-design-engineer-15\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fapple-physical-design-engineer-15"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3821583}},{"tool":"search_jobs","arguments":{"company":"apple.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3821583},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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