RFIC Design Engineer

Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what’s considered feasible? As part of a world-class modem team, you’ll craft groundbreaking embedded firmware that delivers more performance in our products than ever. You’ll work across fields to transform improved hardware elements into a single, integrated design. Join us, and you’ll help us innovate new cellular technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you’ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers worldwide. Do you want to have an impact on every single Apple product? The wireless RFIC team architects, designs, and validates radio transceivers integrated into wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by an outstanding vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering! As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple’s groundbreaking wireless connectivity solutions into hundreds of millions of products.

Description

You will provide RFIC designs for wireless SoC and drive them to mass production for Apple’s Wireless Connectivity products. Responsibilities include: Hands-on design contributions, from concept, architecture, and topology to transistor-level feasibility studies, power, area, and performance trade-off analysis to actual design, simulations, and extractions. Design and deliver radio transceiver building blocks and chains, including TX, RX, and PLL-LOGen for wireless connectivity products. Work closely with RF Systems on block-level and high-level specifications of the TX RX line-ups and PLL-LOGen and on the accurate distribution of spec margins in the chain. Design of RF and Analog loopbacks for calibration and compensation. Work through Co-Existence scenarios and design to meet the CoEx requirements. We collaborate closely with RFIC test engineers in the setup, debugging, and optimization of the wireless connectivity chip throughout productization. Provide design versus silicon measurements correlation and compliance with specifications for volume production.

Minimum Qualifications

BS and 3 + years of relevant industry experience.

Understanding of analog design concepts such as noise analysis, linearity, mismatch, stability, and other analog impairments.

Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.

RF/analog and mixed-signal design experience in ground-breaking RF CMOS design.

Deep understanding of analog, mixed-signal, and RF circuit design. This includes the design of LNAs, PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters, and calibration methods associated with such high-performance wireless systems.

Experienced in Silicon characterization and debugging.

Preferred Qualifications

MSEE and PhD plus relevant industry experience.

Deep experience in crafting and bringing wireless transceivers into mass production is a plus.

Familiarity with various RF transceiver architectures and their trade-offs and system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.

Understanding of the impact of modulation type on radio architecture and requirements.

Proven capability to work with digital design groups for an optimum partition between digital and analog domains.

Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).