{"id":2949259,"url":"https://alion.io/job/apple-rfic-design-engineer-3","title":"RFIC Design Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":91,"open_postings":931,"ghost_share":0,"stale_share":0.15,"repost_share":0.002,"time_to_fill_p50_days":102,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":162000,"max_usd":313000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":609},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"MATLAB","optional":false},{"name":"SystemVerilog","optional":true}],"status":"live","first_seen_at":"2026-10-20T17:34:59Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-23T19:24:05Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what’s considered feasible? As part of an outstanding `team, you’ll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You’ll work across fields to transform improved hardware elements into a single, coordinated design. Join us, and you’ll help us innovate new technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you’ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers worldwide.\nDescription\nThe wireless RFIC team architects, designs, and validates radio transceivers integrated into wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by an outstanding vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering! As an RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, giving to Apple’s groundbreaking wireless connectivity solutions into hundreds of millions of products.\nMinimum Qualifications\nBS and 3 + years of relevant industry experience.\nUnderstanding of analog design concepts such as noise analysis, linearity, mismatch, stability, and other analog impairments.\nExperienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.\nExpertise in analog, mixed-signal, and RF circuit design. This includes the design of LNAs, PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters, and calibration methods associated with such high-performance wireless systems.\nExperienced in Silicon characterization and debugging.\nPreferred Qualifications\nMSEE and PhD plus relevant industry experience.\nDeep experience in crafting and bringing wireless transceivers into mass production is a plus.\nFamiliarity with various RF transceiver architectures and their trade-offs and system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.\nUnderstanding of the impact of modulation type on radio architecture and requirements.\nProven capability to work with digital design groups for an optimum partition between digital and analog domains.\nFamiliarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).","description_format":"text","description_chars":2738,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Operating Systems","Laptops","Smartwatches & Fitness Trackers","Tablets"],"lifecycle":[{"event":"open","at":"2026-10-20T19:26:25Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 6,350 · green card filings: 37","filings_12m":6350,"filings_prev_12m":6527,"green_card_filings_12m":37,"median_offered_wage_usd":177355,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":1366}],"liveness":{"score":100,"band":"hot","label":"Hiring now","p_open":1,"p_active":1,"p_room":1,"age_days":2,"expected_fill_days":102,"reasons":["conf:1","wave","urgency","velocity","win:early","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/apple-rfic-design-engineer-3","json_url":"https://alion.io/job/apple-rfic-design-engineer-3.json","meta":{"generated_at":"2026-10-23T20:39:29Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2399,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":12},"rest":"https://alion.io/mcp/rest/get_company?id=12"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fapple-rfic-design-engineer-3"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fapple-rfic-design-engineer-3"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fapple-rfic-design-engineer-3"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/apple-rfic-design-engineer-3\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fapple-rfic-design-engineer-3"}]}