{"id":3738100,"url":"https://alion.io/job/apple-senior-wireless-soc-design-verification-engineer","title":"Senior Wireless SoC Design Verification Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":89,"open_postings":835,"ghost_share":0,"stale_share":0.217,"repost_share":0.006,"time_to_fill_p50_days":90,"computed_at":"2026-11-09T06:03:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"C++","optional":true},{"name":"Cadence JasperGold","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Wi-Fi","optional":true}],"status":"live","first_seen_at":"2026-10-07T08:54:59Z","employer_posted_date":"2026-11-04","last_verified_at":"2026-11-09T04:13:04Z","board_verified":true,"closed_at":null,"days_open":32,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":32},"description":"Apple's wireless chip powers connectivity across every new iPhone - and its successor is already taking shape. Would you like to join Apple's growing wireless silicon development team?\nOur Wireless SOC organization owns every aspect of wireless silicon development, with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level. It is driven by a world-class, vertically integrated team spanning RF/Analog, Systems/PHY/MAC, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.\nAs a Wireless SOC Design Verification Engineer, you'll be at the heart of the chip design effort - owning a meaningful verification scope and growing it project to project.\nYou'll work alongside DV methodologists, designers, architects, communication systems engineers, and firmware engineers to build reusable testbenches and verification environments using the latest metric-driven verification methodology.\nDescription\nYou'll be responsible for pre-silicon RTL verification at the block, subsystem, and top-level SOC, taking your scope from test planning through coverage closure and signoff.\nYour activity may focus at block level, subsystem level, or top-level SOC, including end-to-end simulations of the entire data/control path.\nMinimum Qualifications\nBS in Electrical Engineering or Computer Engineering\nMinimum of 8 years relevant industry experience\nHands-on experience across the verification cycle: test planning, testbench implementation, test creation and debug, and coverage closure\nStrong SystemVerilog and Verilog skills, with solid working knowledge of UVM and DV methodologies\nSolid problem-solving and debugging skills with constrained-random verification\nUnderstanding of digital logic design, SOC architecture, and microarchitecture\nSelf-motivated and dedicated, with proven creative thinking capabilities\nAbility to handle multiple tasks and prioritise work to meet deadlines\nPreferred Qualifications\nGreat teammate with excellent communication skills and the desire to take on diverse challenges\nExperience taking at least one ASIC/SOC from concept through tape-out\nExperience with MAC or PHY verification\nExperience verifying IP or top-level integration for a WiFi or Bluetooth SOC, or knowledge of wireless protocols\nVerification experience with PCIe, bus fabric/NOC, or AHB/AXI-based architectures in a UVM environment\nExperience with low-power verification, UPF, boot-up, power-cycling, and HW/FW interaction\nExperience with SystemVerilog Assertions (SVA) and/or formal tools (e.g., JasperGold)\nExperience defining coverage space and writing coverage models\nExperience with embedded CPU verification; programming in C/C++ or assembly\nScripting in Python or Perl; interest in applying AI/ML to verification workflows","description_format":"text","description_chars":2853,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Operating Systems","Smartwatches & Fitness Trackers","Tablets"],"lifecycle":[{"event":"open","at":"2026-11-04T10:34:43Z"}],"visa":[],"liveness":{"score":89,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.991,"p_room":0.9,"age_days":32,"expected_fill_days":90,"reasons":["conf:1","urgency","velocity","win:mid","comp:brand"],"computed_at":"2026-11-09T06:03:00Z"},"pay":null,"html_url":"https://alion.io/job/apple-senior-wireless-soc-design-verification-engineer","json_url":"https://alion.io/job/apple-senior-wireless-soc-design-verification-engineer.json","meta":{"generated_at":"2026-11-09T07:19:43Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4422,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-10T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":12},"rest":"https://alion.io/mcp/rest/get_company?id=12"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fapple-senior-wireless-soc-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fapple-senior-wireless-soc-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fapple-senior-wireless-soc-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/apple-senior-wireless-soc-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fapple-senior-wireless-soc-design-verification-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3738100}},{"tool":"search_jobs","arguments":{"company":"apple.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3738100},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); 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