{"id":2980752,"url":"https://alion.io/job/apple-serdes-circuit-design-engineer-11","title":"SerDes Circuit Design Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":91,"open_postings":913,"ghost_share":0.001,"stale_share":0.157,"repost_share":0.003,"time_to_fill_p50_days":98,"computed_at":"2026-10-28T05:59:10Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Beaverton, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":199000,"max_usd":367000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":563},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"MATLAB","optional":true},{"name":"Python","optional":true},{"name":"Synopsys PrimeTime","optional":true},{"name":"SystemVerilog","optional":true}],"status":"live","first_seen_at":"2026-09-28T21:18:17Z","employer_posted_date":"2026-10-21","last_verified_at":"2026-10-28T16:48:46Z","board_verified":true,"closed_at":null,"days_open":29,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":29},"description":"We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple’s world-leading system-on-chip (SOC).\nIn this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create, execute and drivestate-of-the-art IPs key to Apple’s products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency.\nIf you have strong fundamentals and a track record of tackling technical challenges,\nIf you are passionate about learning new skills and improving the value of your work,\nIf you like to be tuned to the big picture while diving deeply into the details to innovate and tackle problems.\nWe invite you to join and grow with our team!\nDescription\nYou will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best-in-class power, performance, and area (PPA).\nYou will be leading discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it a rewarding and growth-oriented work environment.\nMinimum Qualifications\nBS and a minimum of 10 years relevant industry experience.\nPreferred Qualifications\nDeep understanding of analog mixed-signal design with experience in high-speed serial links.\nExperience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters\nUnderstanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques\nUnderstanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)\nProven track record of working with system and architecture teams to drive block-level and IP requirements for high-speed IO in 100+ Gbps NRZ and PAM applications\nProven track record of working with large teams and guiding junior engineers to develop circuit components required in TX, RX, PLL etc. of a high-speed IO.\nExperience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts\nExperience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 100+ Gbps NRZ and PAM applications\nExperience with EQ adaptation methods and circuit implementations to improve PPA\nSolid understanding of CDR architectures and implementations\nExperience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)\nHands-on experience to drive lab testing, debug and data analysis\nHands-on experience in advanced CMOS technologies, design with FinFet technology\nHands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization\nConcepts of timing closure and related industry tools (e.g., Nanotime, Primetime)\nConcepts of IP delivery and quality checks\nKnowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired\nSkills in scripting and automation to enhance efficiency are highly desirable","description_format":"text","description_chars":4217,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Electrical & Electronic Engineering","Operating Systems","Smartwatches & Fitness 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