{"id":2992037,"url":"https://alion.io/job/apple-serdes-design-and-validation-engineer-5","title":"SerDes Design and Validation Engineer","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":94,"open_postings":1125,"ghost_share":0.001,"stale_share":0.036,"repost_share":0.02,"time_to_fill_p50_days":148,"computed_at":"2026-11-12T10:38:37Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":116000,"max_usd":273000,"period":"year","method":"role_country_seniority_unknown","sample_n":14270},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-07-29T20:59:14Z","employer_posted_date":"2026-11-13","last_verified_at":"2026-11-13T23:55:37Z","board_verified":true,"closed_at":null,"days_open":107,"trust":{"level":"ok","repost_count":1,"flags":[],"days_open":106},"description":"Apple is looking for a SerDes Design and Validation Engineer to Lead system validation of mixed-signal SerDes IP. In this highly visible role, you will contribute to the design, integration and validation of high-performance analog and mixed-signal circuits for SerDes PHY applications. This encompasses the design and optimization of critical building blocks such as receivers, transmitters, bias generators, high-speed clock generation and distribution networks targeting best-in-class power, performance, and area metrics. A key part of your design responsibilities will include the development of analog DFT circuits and techniques essential for comprehensive PHY validation. You will develop test plans, review and analyze data to guarantee a robust IP design. You will drive and work closely with production test (e.g. ATE, system validation) teams and debug complex design and system bring-up issues.\nAt Apple, we strive every day to create products that enrich people’s lives - a mission that brings exciting challenges in SOC/PHY design! We’re looking for individuals with strong fundamentals and a proven track record to tackle complex technical problems. You are driven by curiosity, eager to learn new skills, and motivated to maximize the impact of your work. You see the big picture while diving deeply into details to innovate and solve problems. You thrive in collaborative, diverse teams, maintaining a positive spirit even when challenges arise. Above all, you care about making a difference in society and demonstrate leadership through meaningful contributions.\nWe have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apple’s customers every day.\nAnd all of this while enjoying a great culture where you own your career.\nDescription\nIn this role, the key responsibilities are the following:\nOwnership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system.\nWork with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success.\nBe involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.\nMinimum Qualifications\nMinimum requirement of a bachelors degree.\nPreferred Qualifications\nThe ideal candidate should have experience in high-speed serial links with expertise in the following:\nSolid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.\nSolid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques.\nSolid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops).\nHands-on experience to drive lab and production testing, debug, and data analysis\nHands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.\nSkills in scripting and automation to enhance efficiency are highly desirable.\nExperience in high-speed serial links, with knowledge of common high-speed SerDes protocols like PCIe, USB, DP, and MPHY.\nKnowledge of Tx/Rx equalization techniques and circuits, including CTLE, DFE, and de-emphasis, as well as CDR architectures and implementations.\nKnowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired.\nExposure to firmware assisted mixed signal IP development is desirable.\nKnowledge and inquisitiveness in AI/ML domains, and ability to apply the concepts for improved silicon performance, and also for productivity improvements in the design/validation of the IP","description_format":"text","description_chars":4164,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Operating Systems","Laptops","Smartwatches & Fitness Trackers","Tablets"],"lifecycle":[{"event":"open","at":"2026-10-21T10:08:55Z"},{"event":"close","at":"2026-10-21T16:58:38Z"},{"event":"reopen","at":"2026-11-11T11:18:52Z"},{"event":"close","at":"2026-11-11T22:29:36Z"},{"event":"reopen","at":"2026-11-12T04:23:18Z"},{"event":"close","at":"2026-11-12T16:09:35Z"},{"event":"reopen","at":"2026-11-13T04:11:20Z"},{"event":"close","at":"2026-11-13T10:47:28Z"},{"event":"reopen","at":"2026-11-13T23:46:56Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 6,350 · green card filings: 39","filings_12m":6350,"filings_prev_12m":6528,"green_card_filings_12m":39,"median_offered_wage_usd":177313,"route":null,"cap_exempt":false,"checked_at":"2026-11-12T07:36:15+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":54,"band":"ok","label":"Likely open","p_open":1,"p_active":0.896,"p_room":0.6,"age_days":105,"expected_fill_days":148,"reasons":["conf:0","urgency","velocity","win:late","crowd:brand"],"computed_at":"2026-11-12T10:38:37Z"},"pay":null,"html_url":"https://alion.io/job/apple-serdes-design-and-validation-engineer-5","json_url":"https://alion.io/job/apple-serdes-design-and-validation-engineer-5.json","meta":{"generated_at":"2026-11-14T01:31:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1267,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":12},"rest":"https://alion.io/mcp/rest/get_company?id=12"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fapple-serdes-design-and-validation-engineer-5"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"free","price":{"credits":0,"usd":0},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fapple-serdes-design-and-validation-engineer-5"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fapple-serdes-design-and-validation-engineer-5"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/apple-serdes-design-and-validation-engineer-5\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fapple-serdes-design-and-validation-engineer-5"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2992037}},{"tool":"search_jobs","arguments":{"company":"apple.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2992037},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}