{"id":2133309,"url":"https://alion.io/job/apple-soc-physical-design-engineer-pnr-3","title":"SoC Physical Design Engineer, PnR","company":{"id":12,"name":"Apple","domain":"apple.com","url":"https://alion.io/company/apple","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Apple Jobs","truth_index":{"grade":"A","score":95,"open_postings":497,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":191,"computed_at":"2026-10-20T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Irvine, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":230000,"max_usd":419000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":527},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-07-28T21:43:33Z","employer_posted_date":"2026-10-21","last_verified_at":"2026-10-21T03:21:23Z","board_verified":true,"closed_at":null,"days_open":84,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":84},"description":"Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!\nIn this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.\nDescription\nWork with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.\nComplete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.\nTiming, physical and electrical verification, and driving the signoff closure for the partitions.\nResolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.\nDrive optimization of PnR partitions, to achieve best Power/Performance/Area.\nMinimum Qualifications\nMinimum BS and 10+ years of relevant industry experience\nExperience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification\nExperience with physical design construction and analysis flows and methodology\nPreferred Qualifications\nMS in Electrical/Electronics/Computer Engineering or related field\nExperience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ\nFamiliar with various process-related design issues including Design for Yield and Manufacturability and multi-vt strategies\nExperience with industry standard tools, understanding their capabilities and underlying algorithms\nExperience with typical SOC issues such as multiple voltage and clock domains and mixed signal block integration\nFrom a CAD perspective, experience with floorplanning tools, P&R flows, global timing verification, and physical design verification flows\nAbility to adhere to stringent schedule and die size requirements\nStrong communication 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