{"id":447424,"url":"https://alion.io/job/arago-mixed-signal-ic-design-engineer","title":"Mixed-signal IC Design Engineer","company":{"id":173018,"name":"Arago","domain":"arago.inc","url":"https://alion.io/company/arago-2","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"B","score":83,"open_postings":4,"ghost_share":0,"stale_share":0.5,"repost_share":0,"time_to_fill_p50_days":76,"computed_at":"2026-10-29T05:49:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Paris, France","Tel Aviv, Israel"],"countries":["FR","IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":47000,"max_usd":89000,"period":"year","method":"role_country_seniority_unknown","sample_n":66},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Hugging Face","optional":false},{"name":"Machine Learning","optional":false},{"name":"SystemVerilog","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-08-28T12:56:05Z","employer_posted_date":"2026-09-15","last_verified_at":"2026-10-29T09:02:55Z","board_verified":true,"closed_at":null,"days_open":61,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":61},"description":"Meet Arago and the Aragonians\nArago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.\nFounded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.\nComposed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:\nDo great things: we deliver work we’re proud to sign our name to.\n\nHigh velocity: speed matters. We move quickly, one step at a time.\n\nOne unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.\n\nArago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.\nWhat you’ll do\nDesign, integrate, and deliver high-performance digital subsystems within mixed-signal ICs, enabling control, calibration, and high-speed data movement in analog-centric environments - owning the flow from RTL to physical implementation and tape-out.\nResponsibilities\nDesign and verify digital subsystems that interface directly with high-speed analog and mixed-signal circuits - including calibration engines, control FSMs, data converters, and multiplexing logic.\n\nContribute to the design of analog components at the digital-analog interface: calibration circuits, DACs/ADCs, comparators, and others.\n\nIntegrate and customize external IP blocks (e.g., GPIOs, LVDS I/Os, serial interfaces), ensuring compliance with analog signal and timing requirements.\n\nLead the digital implementation flow for mixed-signal blocks: from RTL to synthesis, floorplanning, P&R, timing closure, physical signoff, and tape-out.\n\nCollaborate closely with analog, layout, and system teams to co-optimize digital-analog boundaries, resolve cross-domain issues, and ensure robust high-speed performance.\n\nContribute to the development of high-speed serial I/O subsystems - experience in the design and implementation of SerDes blocks is a significant advantage.\n\nLanguage: English at a proficient level. French is a plus.\n\nRequired Skills and Experience\nStrong experience in digital RTL design (Verilog/SystemVerilog), particularly for mixed-signal systems involving high-speed calibration/control loops, converters, multiplexers, and serial/parallel data paths.\n\nExperience with analog IC development environments (Virtuoso or equivalent).\n\nDeep understanding of digital-analog integration challenges, including timing closure, noise coupling, clock domain crossing, and analog-aware floorplanning in high-speed environments.\n\nProven ability to drive digital blocks from design through verification, synthesis, floorplanning, P&R, and tape-out, especially in the context of analog or RF ICs.\n\nSkilled in integrating and adapting external IPs such as GPIOs, LVDS, SPI/I²C interfaces; experience with high-speed serializers/deserializers (SerDes) is a highly valued plus.\n\nProficient with industry-standard EDA toolchains for both front-end (design/verification) and back-end (physical implementation), with a strong grasp of mixed-signal layout constraints.\n\nPay and benefits\nCompetitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.\n\nMeaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).\n\nRelocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.\n\nHealthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.\n\nOwnership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.\n\nReimbursement of 50% of the public transport subscription fee.\n\nA high-paced, multicultural (with 9 nationalities), and engineering-led environment.","description_format":"text","description_chars":4259,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":["Growth opportunities","Professional development"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":true,"industries":["Processors, MCUs & AI Chips","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-09-06T07:59:09Z"}],"visa":[],"liveness":{"score":56,"band":"ok","label":"Likely open","p_open":1,"p_active":0.752,"p_room":0.75,"age_days":61,"expected_fill_days":76,"reasons":["conf:0","win:late"],"computed_at":"2026-10-29T05:49:05Z"},"pay":null,"html_url":"https://alion.io/job/arago-mixed-signal-ic-design-engineer","json_url":"https://alion.io/job/arago-mixed-signal-ic-design-engineer.json","meta":{"generated_at":"2026-10-29T12:23:22Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":18570,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-30T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":173018},"rest":"https://alion.io/mcp/rest/get_company?id=173018"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Farago-mixed-signal-ic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Farago-mixed-signal-ic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Farago-mixed-signal-ic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/arago-mixed-signal-ic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Farago-mixed-signal-ic-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":447424}},{"tool":"search_jobs","arguments":{"company":"arago.inc","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":447424},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}