{"id":2447636,"url":"https://alion.io/job/argotec-fpga-engineer-sdr-development","title":"FPGA Engineer – SDR Development","company":{"id":2568581,"name":"Argotec","domain":"argotecgroup.com","url":"https://alion.io/company/argotecgroup","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["La Mirada, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":113000,"max_usd":211000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1211},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":false},{"name":"Siemens QuestaSim","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false},{"name":"MATLAB","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-09T00:00:00Z","employer_posted_date":"2026-10-09","last_verified_at":"2026-10-14T13:18:45Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"DUTIES & RESPONSIBILITIES\nAs an FPGA Engineer you will develop next-generation SDR communication payloads for future scientific missions, including deep-space, lunar, and Mars communication systems. Your FPGA designs will directly enable high-throughput waveform processing, multi-channel SDR operations, and real-time RF performance in the harsh radiation and thermal environment of space.\nIn this role in our California team, you will report to the Principal Embedded Systems Engineer . You will work closely with system, RF, hardware, and software engineers in a multidisciplinary environment to implement, integrate, and verify high-performance FPGA designs that support signal processing, data handling, and hardware interfaces for space SDR and telecom systems.\nSpecific duties include (but are not limited to):\nDevelop, implement, and maintain FPGA designs using Verilog, SystemVerilog, or VHDL for space SDR and telecom systems\nDesign and integrate digital signal processing (DSP) functions such as filtering, modulation/demodulation, channelization, and rate conversion\nImplement high-speed digital interfaces (e.g., JESD204, LVDS, SPI, I2C, Ethernet, SpaceWire, or similar) and ensure reliable data transfer between FPGA and peripheral devices\nPerform simulation, verification, and documentation of FPGA designs using tools such as QuestaSim, and Vivado Simulator (including testbench development and verification plans and artifacts)\nSupport synthesis, place-and-route, timing closure, constraint development, and static timing analysis\nIntegrate FPGA designs with embedded processors, firmware, and software; collaborate across multidisciplinary teams to deliver end-to-end system functionality\nSupport hardware bring-up, lab validation, debugging, and system-level testing (including RF performance and environmental qualification)\nAnalyze and optimize FPGA resource utilization, latency, throughput, and power consumption to meet system requirements\nOperate laboratory instrumentation (e.g., oscilloscopes, logic analyzers, spectrum analyzers) to support validation and debugging activities\nDevelop and maintain design documentation, including requirements traceability matrices, interface control documents, and verification artifacts\nPrepare and present FPGA design details at engineering design reviews (e.g., PDR, CDR)\nExecute assigned tasks independently while coordinating priorities with technical leadership and project schedules\nSupport next-generation processor selections and FPGA architecture updates\nGENERAL REQUIREMENTS\nBachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or related fields\nAt least 5+ years of experience in FPGA design and development in a professional or research environment\nU.S. Citizenship or U.S. Permanent Residency is required\nExcellent written and oral communication in English\nREQUIRED EXPERIENCE & SKILLS\nTeam player and a “Do what it takes” attitude\nProficiency in Verilog, SystemVerilog, or VHDL and experience with FPGA toolchains (e.g., Xilinx Vivado) including synthesis, implementation, and timing closure\nExperience with high-speed digital interfaces (e.g., JESD204, LVDS, Ethernet, SpaceWire, or similar)\nExperience designing and implementing digital signal processing (DSP) algorithms in FPGA or fixed-point implementations\nUnderstanding of fixed-point arithmetic and numerical effects in FPGA implementations\nExperience with FPGA verification and validation, including simulation, testbench development, and lab bring-up/debug\nStrong understanding of digital design fundamentals, including clock domain crossing, reset strategies, IP integration, and HW/SW interfacing\nAbility to read and interpret system requirements, schematics, and interface specifications\nStrong documentation skills, including design descriptions, interface control documents, and verification reports\nStrong communication and collaboration skills in a multidisciplinary engineering environment\nFamiliarity with version control systems (e.g., Git) and collaborative development workflows\nAbility to work independently with high attention to detail and ownership of assigned tasks while ensuring alignment with team objectives in a dynamic, fast-paced environment\nAnalytical mind, as well as a continuous learning attitude\nPREFERRED SKILLS\nBackground in Space or Defense industries will be considered as a plus\nSDR architectures, digital communications systems, and RF signal processing\nHands-on experience with Xilinx/AMD Kintex UltraScale and/or Microchip ProAsic3 / PolarFire FPGA platforms (major plus)\nHigh-speed data converter interfaces (ADC/DAC) and JESD204-based systems\nEmbedded processing systems (e.g., LEON, MicroBlaze, Zynq, ARM-based SoCs)\nUnderstanding of radiation effects on digital designs and experience applying mitigation techniques\nFixed-point modeling and algorithm development in MATLAB or Python\nHardware/software co-design and system-level integration, including lab validation of RF or high-speed digital systems\nSpaceflight or high-reliability hardware development (aerospace, defense, or similar)\nSpace communications and aerospace standards (e.g., CCSDS, ECSS, ETSI, NASA)\nStrong problem-solving skills and adaptability across HW/SW/FW boundaries\nIMPORTANT NOTICE\nTo conform to U.S. Government international trade regulations, the applicant must be a U.S. Citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State or U.S. Department of Commerce.\nARGOTEC OFFERS\nAnnual incentive pay is based upon performance and commensurate with the level of the position.\nGenerous benefit package, including medical, dental, and vision plans, 401(k) with 100% match up to 8%, life insurance, 3 weeks paid time off, tuition reimbursement, and more.\nAs an Equal Opportunity Employer, this announcement is aimed at both sexes, under laws 903/77 and 125/91, and to people of all ages and all nationalities, under legislative decrees 215/03 and 216/03. Argotec is committed to fostering an inclusive, accepting, and diverse environment free of discrimination based on race, color, age, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.","description_format":"text","description_chars":6307,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":false}]},"benefits":["Continuous learning","Life insurance"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","Satellite Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-13T13:56:43Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":5,"expected_fill_days":39,"reasons":["conf:11","win:early"],"computed_at":"2026-10-14T06:34:16Z"},"pay":null,"html_url":"https://alion.io/job/argotec-fpga-engineer-sdr-development","json_url":"https://alion.io/job/argotec-fpga-engineer-sdr-development.json","meta":{"generated_at":"2026-10-14T19:22:26Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":25476,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2568581},"rest":"https://alion.io/mcp/rest/get_company?id=2568581"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fargotec-fpga-engineer-sdr-development"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fargotec-fpga-engineer-sdr-development"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fargotec-fpga-engineer-sdr-development"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/argotec-fpga-engineer-sdr-development\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fargotec-fpga-engineer-sdr-development"}]}